首页 >SY100S838LZC>规格书列表
| 零件编号 | 下载&订购 | 功能描述 | 制造商&上传企业 | LOGO |
|---|---|---|---|---|
SY100S838LZC | (첨1, 첨2/3) OR (첨2, 첨4/6) CLOCK GENERATION CHIP DESCRIPTION TheSY100S838/Lisalowskew(÷1,÷2/3)or(÷2,÷4/6)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenby | MicrelMicrel Semiconductor 麦瑞半导体 | Micrel | |
SY100S838LZC | (첨1, 첨2/3) OR (첨2, 첨4/6) CLOCK GENERATION CHIP DESCRIPTION TheSY100S838/Lisalowskew(÷1,÷2/3)or(÷2,÷4/6)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenby | MicrelMicrel Semiconductor 麦瑞半导体 | Micrel | |
SY100S838LZC | (첨1, 첨2/3) OR (첨2, 첨4/6) CLOCK GENERATION CHIP | MicrelMicrel Semiconductor 麦瑞半导体 | Micrel | |
SY100S838LZC | 包装：管件 封装/外壳：20-SOIC（0.295"，7.50mm 宽） 类别：集成电路（IC） 时钟发生器，PLL，频率合成器 描述：IC CLOCK GEN 3.3V/5V 20-SOIC | MicrochipMicrochip Technology 微芯科技微芯科技股份有限公司 | Microchip | |
(첨1, 첨2/3) OR (첨2, 첨4/6) CLOCK GENERATION CHIP DESCRIPTION TheSY100S838/Lisalowskew(÷1,÷2/3)or(÷2,÷4/6)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenby | MicrelMicrel Semiconductor 麦瑞半导体 | Micrel | ||
(첨1, 첨2/3) OR (첨2, 첨4/6) CLOCK GENERATION CHIP DESCRIPTION TheSY100S838/Lisalowskew(÷1,÷2/3)or(÷2,÷4/6)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenby | MicrelMicrel Semiconductor 麦瑞半导体 | Micrel | ||
(첨1, 첨2/3) OR (첨2, 첨4/6) CLOCK GENERATION CHIP | MicrelMicrel Semiconductor 麦瑞半导体 | Micrel | ||
(첨1,첨2/3)OR(첨2,첨4/6)CLOCKGENERATIONCHIP | MicrelMicrel Semiconductor 麦瑞半导体 | Micrel | ||
(첨1,첨2/3)OR(첨2,첨4/6)CLOCKGENERATIONCHIP | MicrelMicrel Semiconductor 麦瑞半导体 | Micrel | ||
(첨1,첨2/3)OR(첨2,첨4/6)CLOCKGENERATIONCHIP | MicrelMicrel Semiconductor 麦瑞半导体 | Micrel | ||
(첨1,첨2/3)OR(첨2,첨4/6)CLOCKGENERATIONCHIP DESCRIPTION TheSY100S838/Lisalowskew(÷1,÷2/3)or(÷2,÷4/6)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenby | MicrelMicrel Semiconductor 麦瑞半导体 | Micrel | ||
(첨1,첨2/3)OR(첨2,첨4/6)CLOCKGENERATIONCHIP DESCRIPTION TheSY100S838/Lisalowskew(÷1,÷2/3)or(÷2,÷4/6)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenby | MicrelMicrel Semiconductor 麦瑞半导体 | Micrel | ||
(첨1,첨2/3)OR(첨2,첨4/6)CLOCKGENERATIONCHIP | MicrelMicrel Semiconductor 麦瑞半导体 | Micrel | ||
(첨1,첨2/3)OR(첨2,첨4/6)CLOCKGENERATIONCHIP DESCRIPTION TheSY100S838/Lisalowskew(÷1,÷2/3)or(÷2,÷4/6)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenby | MicrelMicrel Semiconductor 麦瑞半导体 | Micrel | ||
(첨1,첨2/3)OR(첨2,첨4/6)CLOCKGENERATIONCHIP DESCRIPTION TheSY100S838/Lisalowskew(÷1,÷2/3)or(÷2,÷4/6)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenby | MicrelMicrel Semiconductor 麦瑞半导体 | Micrel | ||
(첨1,첨2/3)OR(첨2,첨4/6)CLOCKGENERATIONCHIP DESCRIPTION TheSY100S838/Lisalowskew(÷1,÷2/3)or(÷2,÷4/6)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenby | MicrelMicrel Semiconductor 麦瑞半导体 | Micrel | ||
(첨1,첨2/3)OR(첨2,첨4/6)CLOCKGENERATIONCHIP | MicrelMicrel Semiconductor 麦瑞半导体 | Micrel | ||
(첨1,첨2/3)OR(첨2,첨4/6)CLOCKGENERATIONCHIP DESCRIPTION TheSY100S838/Lisalowskew(÷1,÷2/3)or(÷2,÷4/6)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenby | MicrelMicrel Semiconductor 麦瑞半导体 | Micrel | ||
(첨1,첨2/3)OR(첨2,첨4/6)CLOCKGENERATIONCHIP | MicrelMicrel Semiconductor 麦瑞半导体 | Micrel | ||
(첨1,첨2/3)OR(첨2,첨4/6)CLOCKGENERATIONCHIP DESCRIPTION TheSY100S838/Lisalowskew(÷1,÷2/3)or(÷2,÷4/6)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenby | MicrelMicrel Semiconductor 麦瑞半导体 | Micrel |
产品属性
- 产品编号：
SY100S838LZC
- 制造商：
Microchip Technology
- 类别：
集成电路（IC） > 时钟发生器，PLL，频率合成器
- 系列：
Precision Edge®
- 包装：
管件
- 类型：
时钟发生器
- PLL：
无
- 输入：
ECL，PECL
- 输出：
时钟
- 比率 - 输入：
1：4
- 差分 - 输入：
是/是
- 频率 - 最大值：
1GHz
- 分频器/倍频器：
是/无
- 电压 - 供电：
3V ~ 3.8V
- 工作温度：
0°C ~ 85°C
- 安装类型：
表面贴装型
- 封装/外壳：
20-SOIC（0.295"，7.50mm 宽）
- 供应商器件封装：
20-SOIC
- 描述：
IC CLOCK GEN 3.3V/5V 20-SOIC
| 供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
MICREL |
20+ |
1562 |
全新现货热卖中欢迎查询 |
询价 | |||
Microchip Technology |
21+ |
20-SOIC |
56200 |
一级代理/放心采购 |
询价 | ||
Micrel |
24+ |
SOIC-20 |
28500 |
授权代理直销,原厂原装现货,假一罚十,特价销售 |
询价 | ||
MICROCHIP |
20+ |
SOP-20 |
1001 |
就找我吧!--邀您体验愉快问购元件! |
询价 | ||
Micrel(麦瑞) |
23+ |
NA |
20094 |
正纳10年以上分销经验原装进口正品做服务做口碑有支持 |
询价 | ||
微芯/麦瑞 |
22+ |
NA |
500000 |
万三科技,秉承原装,购芯无忧 |
询价 | ||
MICREL/麦瑞 |
23+ |
SOP-20 |
50000 |
全新原装正品现货,支持订货 |
询价 | ||
Microchip |
22+ |
NA |
1899 |
加我QQ或微信咨询更多详细信息, |
询价 | ||
Microchip |
22+ |
20SOIC |
9000 |
原厂渠道,现货配单 |
询价 | ||
MICREL/麦瑞 |
2022 |
SOP-20 |
80000 |
原装现货,OEM渠道,欢迎咨询 |
询价 |
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