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SH-2SH7047中文资料瑞萨数据手册PDF规格书

SH-2SH7047
厂商型号

SH-2SH7047

功能描述

Renesas 32-Bit RISC Microcomputer SuperHTMRISC engine Family/SH7000 Series

文件大小

4.62754 Mbytes

页面数量

764

生产厂商 Renesas Technology Corp
企业简称

RENESAS瑞萨

中文名称

瑞萨科技有限公司官网

原厂标识
数据手册

下载地址一下载地址二到原厂下载

更新时间

2024-11-24 20:00:00

SH-2SH7047规格书详情

Overview

The SH7047 group single-chip RISC (Reduced Instruction Set Computer) microprocessors integrate a Renesas-original RISC CPU core with peripheral functions required for system configuration.

The SH7047 group CPU has a RISC-type instruction set. Most instructions can be executed in one state (one system clock cycle), which greatly improves instruction execution speed. In addition, the 32-bit internal-bus architecture enhances data processing power. With this CPU, it has become possible to assemble low cost, high performance/high-functioning systems, even for applications that were previously impossible with microprocessors, such as real-time control, which demands high speeds.

In addition, the SH7047 group includes on-chip peripheral functions necessary for system configuration, such as large-capacity ROM and RAM, timers, a serial communication interface (SCI), Controller area network 2 (HCAN2), an A/D converter, an interrupt controller (INTC), and I/O ports. ROM and SRAM can be directly connected to the SH7047 MCU by means of an external memory access support function. This greatly reduces system cost.

Features

• Central processing unit with an internal 32-bit RISC (Reduced Instruction Set Computer) architecture

- Instruction length: 16-bit fixed length for improved code efficiency

- Load-store architecture (basic operations are executed between registers)

- Sixteen 32-bit general registers

- Five-stage pipeline

- On-chip multiplier: multiplication operations (32 bits × 32 bits → 64 bits) executed in two to four cycles C language-oriented 62 basic instructions

• Various peripheral functions

- Data transfer controller (DTC)

- Multifunction timer/pulse unit (MTU)

- Motor management timer(MMT)

- Compare match timer (CMT)

- Watchdog timer (WDT)

- Asynchronous or clocked synchronous serial communication interface(SCI)

- 10-bit A/D converter

- Clock pulse generator

- Controller area network2 (HCAN2)

- User break controller (UBC)*

- High-performance user debug interface (H-UDI) *

- Advanced user debugger (AUD)*

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