ZL40221中文资料美高森美数据手册PDF规格书

Features

Inputs/Outputs

•Accepts two differential or single-ended inputs

• LVPECL, LVDS, CML, HCSL, LVCMOS

• Glitch-free switching of references

•On-chip input termination and biasing for AC coupled inputs

•Six precision LVDS outputs

•Operating frequency up to 750 MHz

Power

•Option for 2.5 V or 3.3 V power supply

•Current consumption of 97 mA

•On-chip Low Drop Out (LDO) Regulator for superior power supply rejection

Performance

•Ultra low additive jitter of 165 fs RMS

Applications

•General purpose clock distribution

•Low jitter clock trees

•Logic translation

•Clock and data signal restoration

•Redundant clock distribution

•Wired communications: OTN, SONET/SDH, GE, 10 GE, FC and 10G FC

•PCI Express generation 1/2/3 clock distribution

•Wireless communications

•High performance microprocessor clock distribution