鈩?/div>
Algorithms
鈥?Automatically programs and veri铿乪s data at
speci铿乪d address
s
Data Polling and Toggle Bit feature for detection
of program or erase cycle completion
s
Ready/Busy output (RY/BY)
鈥?Hardware method for detection of program or
erase cycle completion
s
Erase Suspend/Resume
鈥?Supports reading data from a sector not being
erased
s
Low power consumption
鈥?20 mA typical active read current for Byte Mode
鈥?28 mA typical active read current for Word Mode
鈥?30 mA typical program/erase current
s
Enhanced power management for standby
mode
鈥?1
碌
A typical standby current
s
Boot Code Sector Architecture
鈥?T = Top sector
鈥?B = Bottom sector
s
Hardware RESET pin
鈥?Resets internal state machine to the read mode
5.0 V-only Flash
GENERAL DESCRIPTION
The Am29F400A is a 4 Mbit, 5.0 Volt-only Flash memory
organized as 512 Kbytes of 8 bits each or 256 Kwords
of 16 bits each. The 4 Mbits of data is divided into 11
sectors of one 16 Kbyte, two 8 Kbyte, one 32 Kbyte,
and seven 64 Kbytes, for 铿俥xible erase capability. The
8 bits of data will appear on DQ0鈥揇Q7 or 16 bits on
DQ0鈥揇Q15. The Am29F400A is offered in 44-pin SO
and 48-pin TSOP packages. This device is designed
to be programmed in-system with the standard system
5.0 Volt V
CC
supply. 12.0 Volt V
PP
is not required for
program or erase operations. The device can also be re-
programmed in standard EPROM programmers.
The standard Am29F400A offers access times of
60 ns, 70 ns, 90 ns, 120 ns and 150 ns, allowing high
speed microprocessors to operate without wait states.
To eliminate bus contention the device has sepa-
rate chip enable (CE), write enable (WE) and output
enable (OE) controls.
The Am29F400A is entirely command set compatible
with the JEDEC single-power-supply Flash standard.
Commands are written to the command register using
standard microprocessor write timings. Register con-
tents serve as input to an internal state-machine
which controls the erase and programming circuitry.
Publication#
20380
Rev:
B
Amendment/0
Issue Date:
April 1997
This document contains information on a product under development at Advanced Micro Devices. The information
is intended to help you evaluate this product. AMD reserves the right to change or discontinue work on this proposed
product without notice.