November 1983
Revised August 2000
CD4051BC • CD4052BC • CD4053BC
Single 8-Channel Analog Multiplexer/Demultiplexer •
Dual 4-Channel Analog Multiplexer/Demultiplexer •
Triple 2-Channel Analog Multiplexer/Demultiplexer
General Description
Features
■ Wide range of digital and analog signal levels:
The CD4051BC, CD4052BC, and CD4053BC analog mul-
tiplexers/demultiplexers are digitally controlled analog
switches having low “ON” impedance and very low “OFF”
leakage currents. Control of analog signals up to 15Vp-p
digital 3 – 15V, analog to 15Vp-p
■ Low “ON” resistance: 80Ω (typ.) over entire 15Vp-p
signal-input range for VDD − VEE = 15V
can be achieved by digital signal amplitudes of 3−15V. For
example, if VDD = 5V, VSS = 0V and VEE = −5V, analog sig-
■ High “OFF” resistance:
channel leakage of ±10 pA (typ.) at VDD − VEE = 10V
nals from −5V to +5V can be controlled by digital inputs of
0−5V. The multiplexer circuits dissipate extremely low qui-
escent power over the full VDD−VSS and VDD−VEE supply
■ Logic level conversion for digital addressing signals of
3 – 15V (VDD − VSS = 3 – 15V) to switch analog signals
voltage ranges, independent of the logic state of the control
signals. When a logical “1” is present at the inhibit input ter-
minal all channels are “OFF”.
to 15 Vp-p (VDD − VEE = 15V)
■ Matched switch characteristics:
∆RON = 5Ω (typ.) for VDD − VEE = 15V
CD4051BC is a single 8-channel multiplexer having three
binary control inputs. A, B, and C, and an inhibit input. The
three binary signals select 1 of 8 channels to be turned
“ON” and connect the input to the output.
■ Very low quiescent power dissipation under all
digital-control input and supply conditions:
1 µ W (typ.) at VDD − VSS = VDD − VEE = 10V
■ Binary address decoding on chip
CD4052BC is a differential 4-channel multiplexer having
two binary control inputs, A and B, and an inhibit input. The
two binary input signals select 1 or 4 pairs of channels to
be turned on and connect the differential analog inputs to
the differential outputs.
CD4053BC is a triple 2-channel multiplexer having three
separate digital control inputs, A, B, and C, and an inhibit
input. Each control input selects one of a pair of channels
which are connected in a single-pole double-throw configu-
ration.
Ordering Code:
Order Number Package Number
Package Description
CD4051BCM
CD4051BCSJ
CD4051BCMTC
CD4051BCN
CD4052BCM
CD4052BCSJ
CD4052BCN
CD4053BCM
CD4053BCSJ
CD4053BCN
M16A
M16D
MTC16
N16E
M16A
M16D
N16E
M16A
M16D
N16E
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
© 2000 Fairchild Semiconductor Corporation
DS005662
www.fairchildsemi.com