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产品型号CY2305C的Datasheet PDF文件预览

CY2305C  
CY2309C  
Errata Revision: [**]  
May 10, 2007  
Errata Document for CY2305C, CY2309C Zero Delay Buffers  
This document describes the errata for the Zero Delay Clock Buffers, CY2305C and CY2309C. Details include errata  
trigger conditions, scope of impact, available workarounds, and silicon revision applicability. Compare this document  
to the device’s data sheet for a complete functional description.  
Contact your local Cypress Sales Representative if you have questions.  
Part Numbers Affected  
Part Number  
CY2305C-1  
CY2305C-1H  
CY2309C-1  
CY2309C-1H  
Temperature Grades  
Packages  
all  
all  
all  
all  
all  
all  
all  
all  
Zero Delay Buffer Qualification Status  
In Production  
Zero Delay Buffer Errata Summary  
The following table defines the errata applicability to available Zero Delay Buffer family devices.  
Note Errata titles are hyperlinked. Click on the table item entry to jump to its description.  
Items  
Part Numbers  
Fix Status  
[1] Possible increased power down current  
All  
Will be corrected in the next silicon revision. The  
errata is forecast to be corrected for all devices  
dated October 2007 and later.  
1. Possible increased power down current  
• PROBLEM DEFINITION  
When the device is in the power down state, an unbonded pad on the die is allowed to float. Because of this,  
power down current may exceed the data sheet limit.  
While high current draw is theoretically possible any time during power down, it has only been observed as a  
transient occurrence shortly after the device enters power down. Steady-state current has always been ob-  
served to be within data sheet limits.  
• PARAMETERS AFFECTED  
Parameter  
Temperature Range  
Commercial  
Data Sheet Maximum  
Actual Maximum  
3.5 mA  
IDD (PD Mode)  
12 µA  
25 µA  
Industrial  
3.5 mA  
• TRIGGER CONDITION(S)  
None.  
Cypress Semiconductor Corporation  
Document Number: 001-15585 Rev. **  
198 Champion Court  
San Jose, CA 95134  
408.943.2600  
Revised May 10, 2007  
Errata Document  
CY2305C  
• SCOPE OF IMPACT  
Possible increased power consumption when in the power down state (that is, when the reference clock is  
static).  
• WORKAROUND  
None.  
• FIX STATUS  
The silicon will be revised to correct this errata. The errata is forecast to be corrected for all devices dated  
October 2007 and later.  
References  
[1] Document # 38-07672, CY2305C and CY2309C Zero Delay Buffer  
Document Number: 001-15585 Rev. **  
Page 2 of 3  
© Cypress Semiconductor Corporation, 2007. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use  
of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be  
used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its  
products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress  
products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.  
Errata Document  
CY2305C  
Document History Page  
Document Title: Errata Document for CY2305C, CY2309C Zero Delay Buffers  
Document Number: 001-15585  
Issue  
Date  
Orig. of  
Change  
REV.  
ECN NO.  
Description of Change  
**  
1058882  
See ECN  
KVM/  
KKVTMP  
Original release of spec.  
Document Number: 001-15585 Rev. **  
Page 3 of 3  
配单直通车
CY2305CSXA-1产品参数
型号:CY2305CSXA-1
是否无铅: 不含铅
是否Rohs认证: 符合
生命周期:Obsolete
零件包装代码:SOIC
包装说明:SOP, SOP8,.25
针数:8
Reach Compliance Code:unknown
HTS代码:8542.39.00.01
风险等级:6.94
系列:2305
输入调节:STANDARD
JESD-30 代码:R-PDSO-G8
JESD-609代码:e3
长度:4.889 mm
逻辑集成电路类型:PLL BASED CLOCK DRIVER
最大I(ol):0.008 A
湿度敏感等级:3
功能数量:1
反相输出次数:
端子数量:8
实输出次数:4
最高工作温度:85 °C
最低工作温度:-40 °C
输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY
封装代码:SOP
封装等效代码:SOP8,.25
封装形状:RECTANGULAR
封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):260
电源:3.3 V
传播延迟(tpd):8.7 ns
认证状态:Not Qualified
Same Edge Skew-Max(tskwd):0.2 ns
座面最大高度:1.727 mm
子类别:Clock Drivers
最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):3.3 V
表面贴装:YES
温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)
端子形式:GULL WING
端子节距:1.27 mm
端子位置:DUAL
处于峰值回流温度下的最长时间:20
宽度:3.8985 mm
最小 fmax:133.33 MHz
Base Number Matches:1
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