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产品型号BR93G76FV-3的Datasheet PDF文件预览

Datasheet  
Serial EEPROM series Standard EEPROM  
MicroWire BUS EEPROM (3-Wire)  
BR93G76-3  
General Description  
BR93G76-3 is serial EEPROM of serial 3-line Interface method.  
They are dual organization(by 16bit or 8bit) and it is selected by the input of ORG PIN.  
Features  
Packages W(Typ.) x D(Typ.)x H(Max.)  
3-line communications of chip select, serial clock,  
serial data input / output (the case where input and  
output are shared)  
Operations available at high speed 3MHz clock  
(4.5 V~5.5 V)  
High speed write available (write time 5ms max.)  
Same package and pin configuration from 1Kbit to  
16Kbit  
DIP-T8  
9.30mm x 6.50mm x 7.10mm  
TSSOP-B8  
3.00mm x 6.40mm x 1.20mm  
1.7~5.5V single power source operation  
Address auto increment function at read operation  
Write mistake prevention function  
» Write prohibition at power on  
SOP8  
TSSOP-B8J  
3.00mm x 4.90mm x 1.10mm  
» Write prohibition by command code  
5.00mm x 6.20mm x 1.71mm  
»
Write mistake prevention function at low voltage  
Self-timed programming cycle  
Program condition display by READY / BUSY  
Dual organization : by 16 bit (X16) or 8 bit (X8)  
Compact package  
SOP8/SOP-J8/SSOP-B8/TSSOP-B8/MSOP8/  
TSSOP-B8J/DIP-T8/VSON008X2030  
More than 40 years data retention  
More than 1 million write cycles  
Initial delivery state all addresses FFFFh (X16) or  
FFh (X8)  
SOP- J8  
MSOP8  
4.90mm x 6.00mm x 1.65mm  
2.90mm x 4.00mm x 0.90mm  
SSOP-B8  
3.00mm x 6.40mm x 1.35mm  
VSON008X2030  
2.00mm x 3.00mm x 0.60mm  
BR93G76-3  
Power source  
voltage  
VSON008  
X2030  
DIP-T8*1 SOP8  
SOP-J8 SSOP-B8 TSSOP-B8 TSSOP-B8J MSOP8  
Capacity  
Bit format  
Type  
8Kbit  
512×16 or1024×8 BR93G76-3  
1.7~5.5V  
*1 DIP-T8 is not halogen free package  
Product structureSilicon monolithic integrated circuit This product is not designed protection against radioactive rays  
www.rohm.com  
© 2012 ROHM Co., Ltd. All rights reserved.  
TSZ2211114001  
TSZ02201-09190G100070-1-2  
07.JAN.2013 REV.001  
1/36  
Daattaasshheeeett  
BR93G76-3  
Absolute Maximum Ratings  
Parameter  
Symbol  
Ratings  
Unit  
V
Remarks  
Supply voltage  
VCC  
-0.3 to +6.5  
800 (DIP-T8)  
When using at Ta=25or higher 8.0mW to be reduced per 1.  
When using at Ta=25or higher 4.5mW to be reduced per 1.  
When using at Ta=25or higher 4.5mW to be reduced per 1.  
When using at Ta=25or higher 3.0mW to be reduced per 1.  
When using at Ta=25or higher 3.3mW to be reduced per 1.  
When using at Ta=25or higher 3.1mW to be reduced per 1.  
When using at Ta=25or higher 3.1mW to be reduced per 1.  
When using at Ta=25or higher 3.0mW to be reduced per 1.  
450 (SOP8)  
450 (SOP-J8)  
300 (SSOP-B8)  
330 (TSSOP-B8)  
310 (TSSOP-B8J)  
310 (MSOP8)  
Permissible  
dissipation  
Pd  
mW  
300 (VSON008X2030)  
Storage  
Tstg  
Topr  
65 to +150  
40 to +85  
temperature  
Operating  
temperature  
The Max value of Input voltage/output voltage is not over 6.5V.  
When the pulse width is 50ns or less, the Min value of Input  
voltage/Output voltage is not under -0.8V.  
Input voltage/  
Output voltage  
-0.3 to Vcc+1.0  
150  
V
Junction  
temperature  
Tjmax  
Junction temperature at the storage condition  
Memory cell characteristics (VCC=1.75.5V)  
Limit  
Typ.  
Parameter  
Unit  
Condition  
Min.  
Max.  
Write cycles *1  
1,000,000  
40  
-
-
-
-
Times  
Years  
Ta=25℃  
Ta=25℃  
Data retention *1  
Shipment data all address FFFFh(X16) or FFh(X8)  
*1 Not 100% TESTED  
Recommended Operation Ratings  
Parameter  
Symbol  
VCC  
VIN  
Limits  
1.7~5.5  
0~VCC  
Unit  
V
Supply voltage  
Input voltage  
www.rohm.com  
© 2012 ROHM Co., Ltd. All rights reserved.  
TSZ2211115001  
TSZ02201-09190G100070-1-2  
07.JAN.2013 REV.001  
2/36  
Daattaasshheeeett  
BR93G76-3  
DC characteristics (Unless otherwise specified, VCC=1.75.5V, Ta=-40+85)  
Limits  
Symb  
Parameter  
Unit  
Condition  
ol  
Min.  
Typ.  
Max.  
Input low voltage  
VIL  
VIH  
-0.3*1  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.3VCC  
VCC+1.0  
0.4  
V
V
1.7VVCC5.5V  
Input high voltage  
0.7VCC  
1.7VVCC5.5V  
IOL=2.1mA, 2.7VVCC5.5V  
IOL=100μA  
Output low voltage 1  
Output low voltage 2  
Output high voltage 1  
Output high voltage 2  
Input leakage current1  
Input leakage current2  
Output leakage current  
VOL1  
VOL2  
VOH1  
VOH2  
ILI1  
0
V
0
0.2  
V
2.4  
VCC  
VCC  
+1  
V
IOH=-0.4mA, 2.7VVCC5.5V  
IOH=-100μA  
VCC-0.2  
V
-1  
-1  
-1  
-
µA  
µA  
µA  
mA  
mA  
mA  
mA  
mA  
mA  
µA  
µA  
VIN=0V~VCC(CS,SK,DI)  
VIN=0V~VCC(ORG)  
ILI2  
+3  
ILO  
+1  
VOUT=0V~VCC, CS=0V  
VCC=1.7V, fSK=1MHz, tE/W=5ms (WRITE)  
VCC=5.5V ,fSK=3MHz, tE/W=5ms (WRITE)  
fSK=1MHz (READ)  
1.0  
ICC1  
ICC2  
ICC3  
-
2.0  
-
0.5  
Supply current  
-
1.0  
fSK=3MHz (READ)  
VCC=2.5V, fSK=1MHz  
tE/W=5ms (WRAL, ERAL)  
-
2.0  
VCC=5.5V ,fSK=3MHz  
tE/W=5ms (WRAL, ERAL)  
-
3.0  
ISB1  
ISB2  
-
2.0  
CS=0V, ORG=VCC or OPEN  
CS=0V, ORG=0V  
Standby current  
-
15  
*1 When the pulse width is 50ns or less, the Min value of VIL is admissible to -0.8V.  
www.rohm.com  
TSZ02201-09190G100070-1-2  
07.JAN.2013 REV.001  
3/36  
© 2012 ROHM Co., Ltd. All rights reserved.  
TSZ2211115001  
Daattaasshheeeett  
BR93G76-3  
AC characteristics (Unless otherwise specified, VCC=1.7~2.5V, Ta=-40~+85)  
Limits  
Parameter  
Symbol  
Unit  
Min.  
Typ.  
Max.  
SK frequency  
SK high time  
SK low time  
CS low time  
CS setup time  
DI setup time  
CS hold time  
DI hold time  
fSK  
tSKH  
tSKL  
tCS  
-
250  
250  
250  
200  
100  
0
-
-
-
-
-
-
-
-
-
-
-
-
-
1
MHz  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ms  
-
-
-
-
tCSS  
tDIS  
tCSH  
tDIH  
tPD1  
tPD0  
tSV  
-
-
100  
-
-
Data “1” output delay  
400  
400  
400  
200  
5
Data “0” output delay  
-
Time from CS to output establishment  
Time from CS to High-Z  
Write cycle time  
-
tDF  
-
tE/W  
-
(Unless otherwise specified, VCC=2.5~4.5V, Ta=-40~+85)  
Limits  
Parameter  
Symbol  
Unit  
Min.  
Typ.  
Max.  
SK frequency  
SK high time  
SK low time  
CS low time  
CS setup time  
DI setup time  
CS hold time  
DI hold time  
fSK  
tSKH  
tSKL  
tCS  
-
230  
200  
200  
50  
100  
0
-
-
-
-
-
-
-
-
-
-
-
-
-
2
MHz  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ms  
-
-
-
-
tCSS  
tDIS  
tCSH  
tDIH  
tPD1  
tPD0  
tSV  
-
-
100  
-
-
Data “1” output delay  
200  
200  
150  
100  
5
Data “0” output delay  
-
Time from CS to output establishment  
Time from CS to High-Z  
Write cycle time  
-
tDF  
-
tE/W  
-
(Unless otherwise specified, VCC=4.5~5.5V, Ta=-40~+85)  
Limits  
Parameter  
Symbol  
Unit  
Min.  
-
Typ.  
Max.  
SK frequency  
SK high time  
SK low time  
CS low time  
CS setup time  
DI setup time  
CS hold time  
DI hold time  
fSK  
tSKH  
tSKL  
tCS  
-
-
-
-
-
-
-
-
-
-
-
-
-
3
MHz  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ms  
100  
100  
200  
50  
50  
0
-
-
-
-
tCSS  
tDIS  
tCSH  
tDIH  
tPD1  
tPD0  
tSV  
-
-
50  
-
-
Data “1” output delay  
200  
200  
150  
100  
5
Data “0” output delay  
-
Time from CS to output establishment  
Time from CS to High-Z  
Write cycle time  
-
tDF  
-
tE/W  
-
www.rohm.com  
TSZ02201-09190G100070-1-2  
07.JAN.2013 REV.001  
4/36  
© 2012 ROHM Co., Ltd. All rights reserved.  
TSZ2211115001  
Daattaasshheeeett  
BR93G76-3  
Serial input / output timing  
1/ fSK  
CS  
SK  
tCS S  
tSKH  
tSKL  
tCSH  
tDIS  
tD I H  
DI  
tPD1  
tPD0  
DO (REA D)  
t DF  
tSV  
DO(WRITE)  
STATUS VALID  
Figure 1. Sync data input / output timing  
Data is taken by DI sync with the rise of SK.  
At read operation, data is output from DO in sync with the rise of SK.  
The STATUS signal at write (READY / BUSY) is output after tCS from the fall of CS after write command input, at the area  
DO where CS is high, and valid until the next command start bit is input. And, while CS is low, DO becomes High-Z.  
After completion of each mode execution, set CS low once for internal circuit reset, and execute the following operation  
mode.  
1/fSK is the SK clock cycle, even if fSK is maximum, the SK clock cycle can’t be tSKH(Min.)+tSKL(Min.)  
For “Write cycle time tE/W”, please see Figure 36,37,39,40.  
For “CS low time tCS”, please see Figure 36,37,39,40.  
Block diagram  
Power source voltage detection  
CS  
SK  
Command decode  
Control  
Clock generation  
Write  
prohibition  
High voltage occurrence  
Address  
Address  
Command  
register  
DI  
buffer  
decoder  
9bit or 10bit  
16bit/8bit  
9bit or 10bit  
8,192 bit  
EEPROM  
Data  
R/W  
ORG  
DO  
16bit/8bit  
register  
amplifier  
Dummy bit  
Figure 2. Block diagram  
www.rohm.com  
TSZ02201-09190G100070-1-2  
07.JAN.2013 REV.001  
5/36  
© 2012 ROHM Co., Ltd. All rights reserved.  
TSZ2211115001  
Daattaasshheeeett  
BR93G76-3  
Pin Configuration  
VCC  
DU  
ORG  
GND  
BR93G76-3  
BR93G76F-3  
:DIP-T8  
:SOP8  
BR93G76FJ-3  
BR93G76FV-3  
BR93G76FVT-3  
BR93G76FVJ-3  
BR93G76FVM-3  
BR93G76NUX-3  
:SOP-J8  
:SSOP-B8  
:TSSOP-B8  
:TSSOP-B8J  
:MSOP8  
:VSON008X2030  
CS  
SK  
DI  
DO  
Figure 3. Pin Configuration  
Pin Descriptions  
Pin name  
I / O  
Input  
Input  
Input  
Function  
CS  
SK  
DI  
Chip select input  
Serial clock input  
Start bit, ope code, address, and serial data input  
―――――  
DO  
GND  
ORG  
DU  
Output  
Serial data output, READY / BUSY STATUS display output  
-
All input / output reference voltage, 0V  
Organization select, X16mode or X8 mode*1  
Don’t use terminal *2  
Input  
-
-
VCC  
Supply voltage  
*1 The memory array organization may be divided into either X8 or X16 which is selected by pin ORG.  
When ORG is OPEN or connected to VCC, X16 organization is selected.  
When ORG is connected to ground, X8 organization is selected.  
*2 Terminals not used may be set to any of high, low, and OPEN  
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Typical Performance Curves  
6
6
5
4
3
2
1
0
Ta=-40℃  
5
Ta= 25℃  
Ta= 85℃  
Ta=-40℃  
Ta= 25℃  
Ta= 85℃  
4
3
SPEC  
2
SPEC  
1
0
0
1
2
3
4
5
6
0
1
2
3
4
5
6
SUPPLY VOLTAGE: VCC(V)  
SUPPLY VOLTAGE: VCC(V)  
Figure 5. Input low voltage VIL(CS,SK,DI,ORG)  
Figure 4.Input high voltage VIH (CS,SK,DI,ORG)  
1
0.8  
0.6  
0.4  
0.2  
0
1
0.8  
0.6  
0.4  
0.2  
0
Ta=-40℃  
Ta= 25℃  
Ta= 85℃  
Ta=-40℃  
Ta= 25℃  
Ta= 85℃  
SPEC  
SPEC  
0
1
2
3
4
5
0
1
2
3
4
5
OUTPUT LOW CURRENT : IOL(mA)  
OUTPUT LOW CURRENT:IOL(mA)  
Figure 6.Output low voltage1 VOL1(VCC=2.7V)  
Figure 7. Output low voltage2 VOL2 (VCC=1.7V)  
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Typical Performance CurvesContinued  
5
4
3
2
1
0
Ta=-40℃  
Ta= 25℃  
Ta= 85℃  
Ta=-40℃  
Ta= 25℃  
Ta= 85℃  
4
3
SPEC  
2
SPEC  
1
0
0
0.4  
0.8  
1.2  
1.6  
0
0.4  
0.8  
1.2  
1.6  
OUTPUT HIGH CURRENT: IOH(mA)  
OUTPUT HIGH CURRENT: IOH(mA)  
Figure 9. Output high voltage2 VOH2(VCC=1.7V)  
Figure 8. Output high voltage1 VOH1(VCC=2.7V)  
1.2  
1
5
4
3
2
1
0
SPEC  
0.8  
0.6  
0.4  
0.2  
0
Ta=-40℃  
Ta= 25℃  
Ta= 85℃  
SPEC  
Ta=-40℃  
Ta= 25℃  
Ta= 85℃  
0
1
2
3
4
5
6
0
1
2
3
4
5
6
SUPPLY VOLTAGE: VCC(V)  
SUPPLY VOLTAGE: VCC(V)  
Figure 11. Input leakage current2 ILI2(ORG)  
Figure 10. Input leakage current1 ILI1 (CS,SK,DI)  
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Typical Performance CurvesContinued  
1.2  
2.5  
2
SPEC  
Ta=-40℃  
Ta= 25℃  
Ta= 85℃  
1
0.8  
Ta=-40℃  
Ta= 25℃  
Ta= 85℃  
1.5  
1
0.6  
SPEC  
0.4  
0.2  
0
0.5  
0
0
1
2
3
4
5
6
0
1
2
3
4
5
6
SUPPLYVOLTAGE: VCC(V)  
SUPPLY VOLTAGE: VCC(V)  
Figure 13. Supply current (WRITE )  
ICC1(WRITE, fSK=1MHz)  
Figure 12. Output leakage current ILO(DO)  
5
4
3
2
1
0
2.5  
2
Ta=-40℃  
Ta= 25℃  
Ta= 85℃  
Ta=-40℃  
Ta= 25℃  
Ta= 85℃  
1.5  
1
SPEC  
SPEC  
0.5  
0
0
1
2
3
4
5
6
0
1
2
3
4
5
6
SUPPLY VOLTAGE: VCC(V)  
SUPPLY VOLTAGE: VCC(V)  
Figure 14. Supply current (WRITE)  
CC1(WRITE,fSK=3MHz)  
Figure 15. Supply current (READ)  
ICC2(READ,fSK=1MHz)  
I
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Typical Performance CurvesContinued  
2.5  
2.5  
2
Ta=-40℃  
Ta= 25℃  
Ta= 85℃  
SPEC  
2
1.5  
Ta=-40℃  
Ta= 25℃  
Ta= 85℃  
1.5  
1
SPEC  
1
0.5  
0
0.5  
0
0
1
2
3
4
5
6
0
1
2
3
4
5
6
SUPPLY VOLTAGE: VCC(V)  
SUPPLY VOLTAGE: VCC(V)  
Figure 16. Supply current (READ)  
ICC2(READ,fSK=3MHz)  
Figure 17. Supply current (WRAL)  
ICC3WRAL,fSK=1MHz]  
5
4
3
2
1
0
2.5  
2
Ta=-40℃  
Ta= 25℃  
Ta= 85℃  
SPEC  
SPEC  
Ta=-40℃  
Ta= 25℃  
Ta= 85℃  
1.5  
1
0.5  
0
0
1
2
3
4
5
6
0
1
2
3
4
5
6
SUPPLY VOLTAGE: VCC(V)  
SUPPLYVOLTAGE: VCC(V)  
Figure 19. Standby current  
SB1(CS=0V, ORG=VCC or OPEN)  
Figure 18. Supply current (WRAL)  
ICC3(WRAL,fSK=3MHz)  
I
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Typical Performance CurvesContinued  
20  
1000  
100  
10  
Ta=-40℃  
Ta= 25℃  
Ta= 85℃  
SPEC  
15  
Ta=-40℃  
Ta= 25℃  
Ta= 85℃  
SPEC  
10  
SPEC  
SPEC  
1
5
0
0.1  
0.01  
0
1
2
3
4
5
6
0
1
2
3
4
5
6
SUPPLY VOLTAGE: VCC(V)  
SUPPLY VOLTAGE: VCC(V)  
Figure 20. Standby current  
ISB2(CS=0V, ORG=0V)  
Figure 21. SK frequency fSK  
500  
400  
300  
200  
100  
0
500  
400  
300  
200  
100  
0
Ta=-40℃  
Ta= 25℃  
Ta= 85℃  
Ta=-40℃  
Ta= 25℃  
Ta= 85℃  
SPEC  
SPEC  
SPEC  
SPEC  
SPEC  
SPEC  
0
1
2
3
4
5
6
0
1
2
3
4
5
6
SUPPLY VOLTAGE: VCC(V)  
SUPPLY VOLTAGE: VCC(V)  
Figure 22. SK high time tSKH  
Figure 23. SK low time tSKL  
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Typical Performance CurvesContinued  
50  
0
500  
SPEC  
Ta=-40℃  
Ta= 25℃  
Ta= 85℃  
400  
-50  
Ta=-40℃  
Ta= 25℃  
Ta= 85℃  
300  
-100  
-150  
-200  
-250  
-300  
SPEC  
SPEC  
200  
100  
0
0
1
2
3
4
5
6
0
1
2
3
4
5
6
SUPPLY VOLTAGE: VCC(V)  
SUPPLYVOLTAGE: VCC(V)  
Figure 24. CS low time tCS  
Figure 25. CS hold time tCSH  
150  
100  
50  
300  
250  
200  
150  
100  
50  
SPEC  
SPEC  
Ta=-40℃  
Ta= 25℃  
Ta= 85℃  
SPEC  
Ta=-40℃  
Ta= 25℃  
Ta= 85℃  
0
SPEC  
-50  
0
0
1
2
3
4
5
6
0
1
2
3
4
5
6
SUPPLYVOLTAGE: VCC(V)  
SUPPLY VOLTAGE: VCC(V)  
Figure 27. DI setup time tDIS  
Figure 26. CS setup time tCSS  
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Typical Performance CurvesContinued  
150  
1000  
800  
600  
400  
200  
0
Ta=-40℃  
Ta= 25℃  
Ta= 85℃  
SPEC  
100  
Ta=-40℃  
Ta= 25℃  
Ta= 85℃  
SPEC  
50  
0
SPEC  
SPEC  
-50  
0
1
2
3
4
5
6
0
1
2
3
4
5
6
SUPPLY VOLTAGE: VCC(V)  
SUPPLY VOLTAGE: VCC(V)  
Figure 28. DI hold time tDIH  
Figure 29. Data "0" output delay tPD0  
1000  
800  
600  
400  
200  
0
500  
400  
300  
200  
100  
0
Ta=-40℃  
SPEC  
Ta= 25℃  
Ta= 85℃  
Ta=-40℃  
Ta= 25℃  
Ta= 85℃  
SPEC  
SPEC  
SPEC  
0
1
2
3
4
5
6
0
1
2
3
4
5
6
SUPPLY VOLTAGE: VCC(V)  
SUPPLY VOLTAGE: VCC(V)  
Figure 31. Time from CS to output establishment tSV  
Figure 30. Data "1" output delay tPD1  
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Typical Performance CurvesContinued  
250  
6
5
4
3
2
1
0
SPEC  
SPEC  
200  
Ta=-40℃  
Ta= 25℃  
150  
Ta= 85℃  
SPEC  
100  
Ta=-40℃  
Ta= 25℃  
Ta= 85℃  
50  
0
0
1
2
3
4
5
6
0
1
2
3
4
5
6
SUPPLY VOLTAGE: VCC(V)  
SUPPLYVOLTAGE: VCC(V)  
Figure 33. Write cycle time tE/W  
Figure 32. Time from CS to High-Z tDF  
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Description of operations  
Communications of the MicroWire BUS are carried out by SK (serial clock), DI (serial data input),DO (serial data output) ,and  
CS (chip select) for device selection.  
When to connect one EEPROM to a microcontroller, connect it as shown in Figure 34(a) or Figure 34(b). When to use the  
input and output common I/O port of the microcontroller, connect DI and DO via a resistor as shown in Figure 34(b) (Refer to  
pages 21, 22.), and connection by 3 lines is available.  
In the case of plural connections, refer to Figure 34 (c).  
Micro-  
controller  
Micro-  
controller  
BR93GXX  
BR93GXX  
CS3  
CS2  
CS1  
SK  
Micro-  
controller  
CS  
CS  
SK  
DO  
DI  
CS  
SK  
DI  
CS  
SK  
DI  
DO  
DI  
SK  
DI/O  
DO  
DO  
Device 1  
Device 2  
Device 3  
(a). Connection by 4 lines  
(b). Connection by 3 lines  
(c). Connection example of plural devices  
Figure 34. Connection method with microcontroller  
Communications of the MicroWire BUS are started by the first “1” input after the rise of CS. This input is called a start bit.  
After input of the start bit, input ope code, address and data. Address and data are input all in MSB first manners.  
“0” input after the rise of CS to the start bit input is all ignored. Therefore, when there is limitation in the bit width of PIO of the  
microcontroller, input “0” before the start bit input, to control the bit width.  
Command mode  
ORG=H or OPEN  
Address  
Start  
bit  
Ope  
Data  
Command  
Required clocks(n)  
BR93G76-3  
code  
MSB of Data(Dx) is D15  
MSB of Address(Am) is A9  
Read (READ) *1  
1
10  
A9,A8,A7,A6,A5,A4,A3,A2,A1,A0  
D15~D0(READ DATA)  
BR93G76-3:n=29  
BR93G76-3:n=13  
Write enable (WEN)  
Write disable (WDS)  
Write (WRITE) *2  
Write all (WRAL) *2  
Erase (ERASE)  
1
1
1
1
1
1
00  
00  
01  
00  
11  
00  
1
0
1
0
* * * * * * * *  
* * * * * * * *  
A9,A8,A7,A6,A5,A4,A3,A2,A1,A0  
* * * * * * * *  
A9,A8,A7,A6,A5,A4,A3,A2,A1,A0  
* * * * * * * *  
D15~D0(WRITE DATA)  
D15~D0(WRITE DATA)  
BR93G76-3:n=29  
BR93G76-3:n=13  
0
1
Erase all (ERAL)  
1
0
A9 of BR93G76 becomes Don't Care.  
ORG=L  
Address  
BR93G76-3  
MSB of Address(Am) is A10  
Start  
bit  
Ope  
code  
Data  
Command  
Required clocks(n)  
MSB of Data(Dx) is D7  
Read (READ) *1  
Write enable (WEN)  
Write disable (WDS)  
Write (WRITE) *2  
Write all (WRAL) *2  
Erase (ERASE)  
1
1
1
1
1
1
1
10  
00  
00  
01  
00  
11  
00  
A10,A9,A8,A7,A6,A5,A4,A3,A2,A1,A0  
D7~D0(READ DATA)  
BR93G76-3:n=22  
BR93G76-3:n=14  
1
0
1
0
* * * * * * * * *  
* * * * * * * * *  
A10,A9,A8,A7,A6,A5,A4,A3,A2,A1,A0  
* * * * * * * * *  
A10,A9,A8,A7,A6,A5,A4,A3,A2,A1,A0  
* * * * * * * * *  
D7~D0(WRITE DATA)  
D7~D0(WRITE DATA)  
BR93G76-3:n=22  
BR93G76-3:n=14  
0
1
Erase all (ERAL)  
1
0
A10 of BR93G76 becomes Don't Care.  
Input the address and the data in MSB first manners.  
As for *, input either “1” or “0” .  
*Start bit  
Acceptance of all the commands of this IC starts at recognition of the start bit.  
The start bit means the first “1” input after the rise of CS.  
*1 As for read, by continuous SK clock input after setting the read command, data output of the set address starts, and address data in significant order are  
sequentially output continuously. (Auto increment function)  
*2 For write or write all commands, an internal erase or erase all is included and no separate erase or erase all is needed before write or write all command.  
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Timing chart  
1) Read cycle (READ)  
~  
~  
~  
~  
~  
~  
CS  
*1  
n+1  
*2  
SK  
DI  
n
1
2
4
Am: MSB of address  
Dx: MSB of data  
n: required clocks  
~  
~  
~  
*2  
Am  
A1  
A0  
1
1
0
~  
~  
~  
D0  
0
Dx Dx-1  
D1  
Dx Dx-1  
DO  
~  
High-Z  
*1 Start bit  
When data “1” is input for the first time after the rise of CS, this is recognized as a start bit. And when “1” is input after plural “0” are input, it is  
recognized as a start bit, and the following operation is started. This is common to all the commands to described hereafter.  
*2 For the meaning of Am,Dx,n,please see tables of command mode in Page15. For example, ORG=H or OPEN,Am=A9,Dx=D15,n=29.  
Figure 35. Read cycle  
When the read command is recognized, input address data (16bit or 8bit) is output to serial. And at that moment, at  
taking A0, in sync with the rise of SK, “0” (dummy bit) is output. And, the following data is output in sync  
with the rise of SK.  
This IC has an address auto increment function which is valid only at read command. This is the function where after the  
above read execution, by continuously inputting SK clock, the above address data is read sequentially. And, during the  
auto increment, keep CS at high.  
2) Write cycle (WRITE)  
~  
~  
~  
~  
~  
tCS  
CS  
SK  
DI  
STATUS  
~  
Am: MSB of address  
Dx: MSB of data  
n: required clocks  
n
1
2
4
~  
~  
~  
~  
~  
~  
Dx Dx-1  
D1  
A1  
A0  
D0  
Am  
1
0
1
tSV  
READY  
DO  
BUSY  
~  
High-Z  
tE/W  
For the meaning of Am,Dx,n, please see tables of command mode in Page15.  
Figure 36. Write cycle  
In this command, input 16bit or 8bit data are written to designated addresses (Am~A0). The actual write starts by the fall  
of CS of D0 taken SK clock.  
When STATUS is not detected (CS=low fixed),make sure Max 5ms time is in comforming with tE/W  
.
When STATUS is detected (CS=high), all commands are not accepted for areas where low (BUSY) is output from DO,  
therefore, do not input any command.  
3) Write all cycyle (WRAL)  
~  
~  
~  
~  
tCS  
CS  
SK  
DI  
STATUS  
~  
~  
~  
n
1
2
0
5
~  
~  
Dx: MSB of data  
n: required clocks  
~  
~  
~  
Dx Dx-1  
D1  
D0  
1
0
0
1
~  
~  
tSV  
BUSY  
READY  
DO  
~  
High-Z  
tE/W  
For the meaning of Dx,n,please see tables of command mode in Page15.  
Figure 37. Write all cycle  
In this command, input 16bit or 8bit data is written simultaneously to all adresses. Data is not written continuously per  
one word but is written in bulk, the write time is only Max. 5ms in conformity with tE/W  
In WRAL, STATUS can be detected in the same manner as in WRITE command.  
.
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4) Write enable (WEN) / disable (WDS) cycle  
~  
CS  
SK  
1
2
0
3
4
5
6
7
8
n
~  
n: required clocks  
ENABLE=1  
DISABLE=0  
1
0
~  
~  
DI  
1
0
DO  
High-Z  
For the meaning of n,please see tables of command mode in Page15.  
Figure 38. Write enable (WEN) / disable (WDS) cycle  
At power on, this IC is in write disable status by the internal RESET circuit. Before executing the write command, it is  
necessary to execute the write enable command. And, once this command is executed, it is valid unitl the write disable  
command is executed or the power is turned off. However, the read command is valid irrespective of write enable /  
diable command. Input to SK after 6 clocks of this command is available by either “1” or “0”, but be sure to input it.  
When the write enable command is executed after power on, write enable status gets in. When the write disable  
command is executed then, the IC gets in write disable status as same as at power on, and then the write command is  
canceled thereafter in software manner. However, the read command is executable. In write enable status, even when  
the write command is input by mistake, write is started. To prevent such a mistake, it is recommended to execute the  
write disable command after completion of write.  
5) Erase cycle (ERASE)  
~  
~  
STATUS  
tCS  
CS  
SK  
DI  
~  
~  
~  
~  
~  
n
1
2
4
Am: MSB of address  
n: required clocks  
~  
~  
A1  
A3  
A2  
A0  
Am  
1
1
1
~  
~  
~  
~  
~  
tSV  
BUSY  
READY  
DO  
~  
High-Z  
tE/W  
For the meaning of Am,n,please see tables of command mode in Page15.  
Figure 39. Erase cycle  
In this command, data of the designated address is made into “1”. The data of the designated address  
becomes “FFFFh or FFh”.  
Actual ERASE starts at the fall of CS after the fall of A0 taken SK clock.  
In ERASE, STATUS can be detected in the same manner as in WRITE command.  
6) Erase all cycle (ERAL)  
~  
tCS  
~  
CS  
SK  
DI  
STATUS  
~  
~  
~  
n
1
2
4
~  
~  
~  
n: required clocks  
0
1
0
0
1
~  
~  
~  
tSV  
READY  
DO  
BUSY  
~  
High-Z  
tE/W  
For the meaning of n,please see tables of command mode in Page15.  
Figure 40. Erase all cycle  
In this command, data of all addresses is made into “1”. Data of all addresses becomes ”FFFFh or FFh”.  
Actual ERASE starts at the fall of CS after the falll of the n-th clock from the start bit input.  
In ERAL, STATUS can be detected in the same manner as in WRAL command.  
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BR93G76-3  
Application  
1)Method to cancel each command  
READ  
Address*1  
Data *1  
*1 For the meaning of m,x, please see tables of command mode in Page15  
Start bit  
Ope code  
1bit  
2bit  
m+1bit  
x+1bit  
Cancel is available in all areas in read mode.  
Method to cancelcancel by CS=low  
Figure 41. READ cancel available timing  
WRITE,WRAL  
Clock rise of D0 taken  
n-1  
n
n+1  
n+2  
SK  
DI  
A1  
D0  
a
D1  
c
b
Enlarged figure  
*1  
Start bit  
Ope code  
Address  
Data  
x+1bit  
tE/W  
*1 For the meaning of m,n,x,  
please see tables of command mode in Page15  
1bit  
2bit  
m+1bit  
a
c
b
aFrom start bit to the clock rise of D0 taken  
Cancel by CS=low  
bThe clock rise of D0 taken and after  
Cancellation is not available by any means.  
Note 1) If VCC is made OFF in this area, designated address data is not  
guaranteed, therefore write once again is suggested.  
cn+1 clock rise and after  
Cancel by CS=low  
However, when write is started in b area (CS is ended), cancellation is not  
available by any means.  
And when SK clock is output continuously cancel function is not available.  
Note 2) If CS is started at the same timing as that of the SK rise,  
write execution/cancel becomes unstable, therefore, it is  
recommended to fall in SK=low area.  
As for SK rise, recommend timing of tCSS/tCSH or higher.  
Figure 42. WRITE, WRAL cancel available timing  
ERASE, ERAL  
Clock rise of A0 taken  
n-1  
n
n+2  
n+1  
SK  
DI  
A1  
a
A0  
b
c
Enlarged figure  
*1  
Start bit  
Ope code  
Address  
tE/W  
*1 For the meaning of m,n,please see tables of command mode in Page15  
1bit  
2bit  
m+1bit  
b
a
c
aFrom start bit to clock rise of A0 taken  
Cancel by CS=low  
bClock rise of A0 taken  
Note 1) If VCC is made OFF in this area, designated address data is not  
guaranteed, therefore write once again is suggested.  
Cancellation is not available by any means.  
cn+1 clock rise and after  
Note 2) If CS is started at the same timing as that of the SK rise,  
write execution/cancel becomes unstable, therefore, it is  
recommended to fall in SK=low area.  
Cancel by CS=low  
However, when write is started in b area (CS is ended), cancellation is not  
available by any means.  
As for SK rise, recommend timing of tCSS/tCSH or higher.  
And when SK clock is output continuously cancel function is not available.  
Figure 43. ERASE, ERAL cancel available timing  
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2) At standby  
When CS is low and ORG is high or OPEN, even if SK,DI,DO are low,high or with middle electric potential, current does not  
over ISB1 Max.  
When CS is low, even if SK,DI,DO and ORG are low,high or with middle electric potential, current does not over ISB2 Max.  
3) I/O peripheral circuit  
3-1) Pull down CS.  
By making CS=low at power ON/OFF, mistake in operation and mistake write are prevented.  
Pull down resistance Rcs of CS pin  
To prevent mistake in operation and mistake write at power ON/OFF, CS pull down resistance is necessary. Select an  
appropriate value to this resistance value from microcontroller VOH, IOH, and VIL characteristics of this IC.  
VOHM  
Rcs ≧  
・・・①  
IOHM  
Microcontroller  
VOHM  
EEPROM  
VIHE  
VOHM  
VIHE  
・・・②  
Example) When VCC =5V, VIHE=2V, VOHM=2.4V, IOHM=2mA,  
from the equation ,  
2.4  
Rcs ≧  
high output  
low input  
2×10-3  
IOHM  
Rcs  
Rcs 1.2 [kΩ]  
With the value of Rpd to satisfy the above equation, VOHM becomes  
2.4V or higher, and VIHE (=2.0V), the equation is also satisfied.  
Figure 44. CS pull down resistance  
VIHE  
: EEPROM VIH specifications  
VOHM : Microcontroller VOH specifications  
IOHM : Microcontroller IOH specifications  
3-2) DO is available in both pull up and pull down.  
Do output always is High-Z except in READY / BUSY STATUS and data output in read command.  
Malfunction may occur when High-Z is input to the microcontroller port connected to DO, it is necessary to pull down  
and pull up DO. When there is no influence upon the microcontroller operations, DO may be OPEN.  
If DO is OPEN, and at timing to output STATUS READY, at timing of CS=high, SK=high, DI=high, EEPROM  
recognizes this as a start bit, resets READY output, and DO=High-Z, therefore, READY signal cannot be detected. To  
avoid such output, pull up DO pin for improvement.  
CS  
SK  
DI  
CS  
SK  
DI  
high  
Enlarged  
D0  
High-Z  
CS=SK=DI=high  
When DO=OPEN  
High-Z  
READY  
DO  
DO  
DO  
BUSY  
BUSY  
BUSY  
Improvement by DO pull up  
CS=SK=DI=high  
When DO=pull up  
READY  
Figure 45. READY output timing at DO=OPEN  
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Pull up resistance Rpu and pull down resistance Rpd of DO pin  
As for pull up and pull down resistance value, select an appropriate value to this resistance value from microcontroller  
VIH, VIL, and VOH, IOH, VOL, IOL characteristics of this IC.  
VCCVOLE  
Rpu ≧  
・・・③  
・・・④  
Microcontroller  
VILM  
EEPROM  
IOLE  
VILM  
Rpu  
VOLE  
IOLE  
VOLE  
Example) When VCC =5V, VOLE=0.4V, IOLE=2.1mA, VILM=0.8V,  
from the equation ,  
low input  
50.4  
Rpu ≧  
2.1×10-3  
low output  
Rpu 2.2 [kΩ]  
With the value of Rpu to satisfy the above equation, VOLE becomes  
0.4V or below, and with VILM(=0.8V), the equation is also satisfied.  
Figure 46. DO pull up resistance  
VOLE  
IOLE  
VILM  
: EEPROM VOL specifications  
: EEPROM IOL specifications  
: Microcontroller VIL specifications  
VOHE  
Rpd ≧  
・・・⑤  
EEPROM  
IOHE  
VIHM  
Microcontroller  
VOHE  
・・・⑥  
VIHM  
Example) When VCC =5V, VOHE=VCC0.2V, IOHE=0.1mA,  
VOHE  
V
IHM=VCC×0.7V from the equation ,  
50.2  
IOHE  
high input  
high output  
Rpd  
Rpd ≧  
0.1×10-3  
Rpd 48 [kΩ]  
Figure 47. DO pull down resistance  
With the value of Rpd to satisfy the above equation, VOHE becomes 2.4V  
or below, and with VIHM (=3.5V), the equation is also satisfied.  
VOHE  
IOHE  
VIHM  
: EEPROM VOH specifications  
: EEPROM IOH specifications  
: Microcontroller VIH specifications  
READY / BUSY STATUS display (DO terminal)  
This display outputs the internal STATUS signal. When CS is started after tCS  
from CS fall after write command input, high or low is output.  
R/B displaylow (BUSY) = write under execution  
DO STATUS)  
After the timer circuit in the IC works and creates the period of tE/W, this timer circuit completes automatically.  
And the memory cell is written in the period of tE/W, and during this period, other command is not accepted.  
R/B display = high (READY) = command wait STATUS  
DO STATUS)  
After tE/W (max.5ms) the following command is accepted.  
Therefore, CS=high in the period of tE/W, and If signals are input in SK, DI, malfunction may occur,  
therefore, DI=low in the area  
CS=high. (Especially, in the case of shared input port, attention is required.)  
*Do not input any command while STATUS signal is output. Command input in BUSY area is cancelled, but command input in READY area is accepted.  
Therefore, STATUS READY output is cancelled, and malfunction and mistake write may occur.  
CS  
STATUS  
SK  
CLOCK  
DI  
WRITE  
INSTRUCTION  
DO  
High-Z  
tSV  
READY  
BUSY  
tE/W  
Figure 48. READY/BUSY STATUS output timing chart  
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4) When to directly connect DI and DO  
This IC has independent input terminal DI and output terminal DO, and separate signals are handled on timing chart,  
meanwhile, by inserting a resistance R between these DI and DO terminals, it is possible to carry out control by 1 control line.  
Microcontroller  
EEPROM  
DI/O PORT  
DI  
R
DO  
Figure 49. DI, DO control line common connection  
Data collision of microcontroller DI/O output and DO output and feedback of DO output to DI input of EEPROM.  
Drive from the microcontroller DI/O output to DI input of EEPROM on I/O timing, and output signal from DO output of  
EEPROM occur at the same time in the following points.  
4-1) 1 clock cycle to take in A0 address data at read command  
Dummy bit “0” is output to DO terminal.  
When address data A0 = “1” input, through current route occurs.  
EEPROM CS input  
high  
EEPROM SK input  
*1 For the meaning of x ,  
please see tables of command mode in Page15.  
A1  
A0  
EEPROM DI input  
Collision of DI input and DO output  
*1  
EEPROM DO output  
Microcontroller DI/O port  
0
Dx Dx-1 Dx-2  
High-Z  
A1 A0  
High-Z  
Microcontroller output  
Microcontroller input  
Figure 50. Collision timing at read data output at DI, DO direct connection  
4-2) Timing of CS = high after write command. DO terminal in READY / BUSY function output.  
When the next start bit input is recognized, High-Z gets in.  
Especially, at command input after write, when CS input is started with microcontroller DI/O output low,  
READY output high is output from DO terminal, and through current route occurs.  
Feedback input at timing of these (4-1) and (4-2) does not cause disorder in basic operations, if resistance R is inserted.  
~  
EEPROM CS input  
Write command  
Write command  
Write command  
Write command  
~  
~  
EEPROM SK input  
EEPROM DI input  
~  
~  
~  
~  
High-Z  
READY  
READY  
READY  
Collision of DI input and DO output  
BUSY  
EEPROM DO output  
Microcontroller DI/O port  
~  
BUSY  
Write command  
~  
~  
Microcontroller output  
Microcontroller input  
Microcontroller output  
Figure 51. Collision timing at DI, DO direct connection  
Note) As for the case (4-2), attention must be paid to the following.  
When STATUS READY is output, DO and DI are shared, DI=high and the microcontroller DI/O=High-Z or the microcontroller DI/O=high,if SK clock  
is input, DO output is input to DI and is recognized as a start bit, and malfunction may occur. As a method to avoid malfunction, at STATUS READY  
output, set SK=low, or start CS within 4 clocks after high of READY signal is output.  
Start bit  
CS  
SK  
DI  
Because DI=high, set  
SK=low at CS rise.  
READY  
DO  
High-Z  
Figure.52 Start bit input timing at DI, DO direct connection  
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Selection of resistance value R  
The resistance R becomes through current limit resistance at data collision. When through current flows, noises of  
power source line and instantaneous stop of power source may occur. When allowable through current is defined as I,  
the following relation should be satisfied. Determine allowable current amount in consideration of impedance and so  
forth of power source line in set. And insert resistance R, and set the value R to satisfy EEPROM input level VIH/VIL even  
under influence of voltage decline owing to leak current and so forth. Insertion of R will not cause any influence upon  
basic operations.  
4-3) Address data A0 = “1” input, dummy bit “0” output timing  
(When microcontroller DI/O output is high, EEPROM DO outputs low, and high is input to DI)  
Make the through current to EEPROM 10mA or below.  
See to it that the level VIH of EEPROM should satisfy the following.  
Conditions  
Microcontroller  
EEPROM  
VIHE IOHM×R + VOLE  
At this moment, if VOLE=0V,  
DI/O PORT  
VOHM  
IOHM  
DI  
VIHE IOHM×R  
high output  
VIHE  
R ≧  
R
・・・⑦  
IOHM  
DO  
VIHE  
: EEPROM VIH specifications  
VOLE  
VOLE : EEPROM VOL specifications  
IOHM : Microcontroller IOH specifications  
low output  
Figure 53. Circuit at DI, DO direct connection (Microcontroller DI/O high output, EEPROM low output)  
4-4) DO STATUS READY output timing  
(When the microcontroller DI/O is low, EEPROM DO output high, and low is input to DI)  
Set the EEPROM input level VIL so as to satisfy the following.  
Conditions  
Microcontroller  
DI/O PORT  
EEPROM  
VILE VOHE – IOLM×R  
As this moment, VOHE=VCC  
DI  
low output  
VOLM  
VILE VCC – IOLM×R  
R
IOLM  
VCC – VILE  
R ≧  
・・・⑧  
DO  
IOLM  
VOHE  
high output  
VILE  
VOHE  
IOLM  
: EEPROM VIL specifications  
: EEPROM VOH specifications  
: Microcontroller IOL specifications  
Example) When VCC=5V, VOHM=5V, IOHM=0.4mA, VOLM=5V, IOLM=0.4mA,  
From the equation ,  
From the equation,  
VIHE  
VCC – VILE  
R ≧  
R ≧  
R ≧  
IOHM  
IOLM  
3.5  
0.4×10-3  
5 – 1.5  
2.1×10-3  
R ≧  
R 8.75 [k] ・・・⑨  
R 1.67 [k] ・・・⑩  
Therefore, from the equations and ,  
R 8.75 [k]  
Figure 54. Circuit at DI, DO direct connection (Microcontroller DI/O low output, EEPROM high output)  
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5) I/O equivalence circuit  
Output circuit  
Input citcuit  
RESET int.  
CSint.  
DO  
CS  
OEint.  
Figure 56. Input circuit (CS)  
Figure 55. Output circuit (DO)  
Input circuit  
Input circuit  
CS int.  
CS int.  
DI  
SK  
Figure 57. Input circuit (DI)  
Figure 58. Input circuit (SK)  
6) Power-Up/Down conditions  
At power ON/OFF, set CS low.  
When CS is high, this IC gets in input accept status (active). If power is turned on in this status, noises and the likes may  
cause malfunction, mistake write or so. To prevent these, at power ON, set CS low. (When CS is in low status all inputs  
are cancelled.) And at power decline, owing to power line capacity and so forth, low power status may continue long. At  
this case too, owing to the same reason, malfunction, mistake write may occur, therefore, at power OFF too, set CS low.  
VCC  
VCC  
GND  
VCC  
CS  
GND  
Bad example  
Good example  
Figure 59. Timing at power ON/OFF  
Bad exampleCS pin is pulled up to VCC  
Good exampleIt is low at power ON/OFF.  
Set 10ms or higher to recharge at power OFF.  
In this case, CS becomes high (active status), and EEPROM may have malfunction,  
mistake write owing to noise and the likes.  
Even when CS input is High-Z, the status becomes like this case, which please note.  
When power is turned on without observing this condition,  
IC internal circuit may not be reset, which please note.  
POR citcuit  
This IC has a POR (Power On Reset) circuit as a mistake write countermeasure. After POR operation, it gets in write  
disable status. The POR circuit is valid only when power is ON, and does not work when power is OFF. However, if CS is  
high at power ON/OFF, it may become write enable status owing to noises and the likes. For secure operations, observe  
the follwing conditions.  
1. Set CS=low  
2. Turn on power so as to satisfy the recommended conditions of tR, tOFF, Vbot for POR circuit operation.  
Recommended conditions of tR, tOFF, Vbot  
tR  
VCC  
tR  
tOFF  
Vbot  
10ms or below  
100ms or below  
10ms or higher  
10ms or higher  
0.3V or below  
0.2V or below  
tOFF  
Vbot  
0
Figure 60. Rise waveform diagram  
LVCC circuit  
LVCC (VCC-Lockout) circuit prevents data rewrite operation at low power, and prevents wrong write.  
At LVCC voltage (Typ.=1.2V) or below, it prevent data rewrite  
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7)Noise countermeasures  
VCC noise (bypass capacitor)  
When noise or surge gets in the power source line, malfunction may occur, therefore, for removing these, it is  
recommended to attach a by pass capacitor (0.1μF) between IC VCC and GND, At that moment, attach it as close to IC  
as possible.And, it is also recommended to attach a bypass capacitor between board VCC and GND.  
SK noise  
When the rise time of SK is long, and a certain degree or more of noise exists, malfunction may occur owing to clock bit  
displacement. To avoid this, a Schmitt trigger circuit is built in SK input. The hysteresis width of this circuit is set about  
0.2V, if noises exist at SK input, set the noise amplitude 0.2Vp-p or below. And it is recommended to set the rise time of  
SK 100ns or below. In the case when the rise time is 100ns or higher, take sufficient noise countermeasures. Make the  
clock rise, fall time as small as possible.  
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Operational Notes  
(1) Described numeric values and data are design representative values, and the values are not guaranteed.  
(2) We believe that application circuit examples are recommendable, however, in actual use, confirm characteristics further  
sufficiently. In the case of use by changing the fixed number of external parts, make your decision with sufficient margin in  
consideration of static characteristics and transition characteristics and fluctuations of external parts and our LSI.  
(3) Absolute Maximum Ratings  
If the absolute maximum ratings such as supply voltage and operating temperature and so forth are exceeded, LSI may  
be destructed. Do not impress voltage and temperature exceeding the absolute maximum ratings. In the case of fear  
exceeding the absolute maximum ratings, take physical safety countermeasures such as fuses, and see to it that  
conditions exceeding the absolute maximum ratings should not be impressed to LSI.  
(4) GND electric potential  
Set the voltage of GND terminal lowest at any operating condition. Make sure that each terminal voltage is not lower than  
that of GND terminal in consideration of transition status.  
(5) Heat design  
In consideration of allowable loss in actual use condition, carry out heat design with sufficient margin.  
(6) Terminal to terminal short circuit and wrong packaging  
When to package LSI onto a board, pay sufficient attention to LSI direction and displacement. Wrong packaging may  
destruct LSI. And in the case of pin short between LSI terminals and terminals, terminals and power source, terminals and  
GND owing to unconnect use, LSI may be destructed.  
(7) Using this LSI in a strong electromagnetic field may cause malfunction, therefore, evaluate the design sufficiently.  
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Part numbering  
B
R
9
3
G
7
6
x
x
x
3
x
x
x
BUS type  
93MicroWire  
Operating temperature  
/ Operating Voltage  
-40to +85/ 1.7V to 5.5V  
Capacity  
76=8K  
Package  
Blank :DIP-T8  
F
:SOP8  
FJ  
:SOP-J8  
FV  
:SSOP-B8  
:TSSOP-B8  
:TSSOP-B8J  
:MSOP8  
FVT  
FVJ  
FVM  
NUX  
:VSON008X2030  
Process code  
Pin assignment  
Blank: Pin1~8: CS, SK, DI, DO, GND, ORG, DU, VCC respectively  
A
B
: Pin1~8: CS, SK, DI, DO, GND, NC, DU, VCC respectively  
: Pin1~8: DU, VCC, CS, SK, DI, DO, GND, NC respectively  
Packaging and forming specification  
E2  
: Embossed tape and reel  
(SOP8,SOP-J8, SSOP-B8,TSSOP-B8, TSSOP-B8J)  
: Embossed tape and reel  
TR  
(MSOP8, VSON008X2030)  
Blank : Tube  
(DIP-T8)  
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Physical Dimensions Tape and Reel information  
DIP-T8  
9.3± 0.3  
8
5
4
1
7.62  
0.3± 0.1  
0°−15°  
2.54  
0.5± 0.1  
(Unit : mm)  
<Tape and Reel information>  
Container  
Quantity  
Tube  
2000pcs  
Direction of feed Direction of products is fixed in a container tube  
Order quantity needs to be multiple of the minimum quantity.  
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SOP8  
5.0± 0.2  
(MAX 5.35 include BURR)  
+
6
°
4°  
4
°
8
7
6
5
1
2
3
4
0.595  
+0.1  
0.17  
-
0.05  
S
0.1  
S
1.27  
0.42± 0.1  
(Unit : mm)  
<Tape and Reel information>  
Tape  
Embossed carrier tape  
Quantity  
2500pcs  
E2  
Direction  
of feed  
The direction is the 1pin of product is at the upper left when you hold  
reel on the left hand and you pull out the tape on the right hand  
(
)
Direction of feed  
1pin  
Reel  
Order quantity needs to be multiple of the minimum quantity.  
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SOP-J8  
4.9± 0.2  
(MAX 5.25 include BURR)  
+
6°  
4°  
4°  
8
7
6
5
1
2
3
4
0.545  
0.2± 0.1  
S
1.27  
0.42± 0.1  
0.1  
S
(Unit : mm)  
<Tape and Reel information>  
Tape  
Embossed carrier tape  
2500pcs  
Quantity  
E2  
Direction  
of feed  
The direction is the 1pin of product is at the upper left when you hold  
reel on the left hand and you pull out the tape on the right hand  
(
)
Direction of feed  
1pin  
Reel  
Order quantity needs to be multiple of the minimum quantity.  
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SSOP-B8  
3.0± 0.2  
(MAX 3.35 include BURR)  
8
7
6
5
1
2
3
4
0.15± 0.1  
S
0.1  
S
+0.06  
(0.52)  
0.65  
0.22  
0.04  
M
0.08  
(Unit : mm)  
<Tape and Reel information>  
Tape  
Embossed carrier tape  
2500pcs  
Quantity  
E2  
Direction  
of feed  
The direction is the 1pin of product is at the upper left when you hold  
reel on the left hand and you pull out the tape on the right hand  
(
)
Direction of feed  
1pin  
Reel  
Order quantity needs to be multiple of the minimum quantity.  
www.rohm.com  
TSZ02201-09190G100070-1-2  
07.JAN.2013 REV.001  
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TSZ2211115001  
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BR93G76-3  
TSSOP-B8  
3.0± 0.1  
(MAX 3.35 include BURR)  
4 ± ±4  
8
7
6
5
1
2
3
4
1PIN MARK  
+0.05  
0.145  
0.03  
0.525  
S
0.08 S  
+0.05  
0.245  
M
0.04  
0.08  
0.65  
(Unit : mm)  
<Tape and Reel information>  
Tape  
Embossed carrier tape  
Quantity  
3000pcs  
E2  
Direction  
of feed  
The direction is the 1pin of product is at the upper left when you hold  
reel on the left hand and you pull out the tape on the right hand  
(
)
Direction of feed  
1pin  
Reel  
Order quantity needs to be multiple of the minimum quantity.  
www.rohm.com  
TSZ02201-09190G100070-1-2  
07.JAN.2013 REV.001  
31/36  
© 2012 ROHM Co., Ltd. All rights reserved.  
TSZ2211115001  
Daattaasshheeeett  
BR93G76-3  
TSSOP-B8J  
3.0± 0.1  
(MAX 3.35 include BURR)  
4 ± ±4  
8
7
6
5
1
2
3
4
1PIN MARK  
+0.05  
0.525  
0.145  
0.03  
S
0.08 S  
+0.05  
0.32  
0.04  
M
0.08  
0.65  
(Unit : mm)  
<Tape and Reel information>  
Tape  
Embossed carrier tape  
2500pcs  
Quantity  
E2  
Direction  
of feed  
The direction is the 1pin of product is at the upper left when you hold  
reel on the left hand and you pull out the tape on the right hand  
(
)
Direction of feed  
1pin  
Reel  
Order quantity needs to be multiple of the minimum quantity.  
www.rohm.com  
TSZ02201-09190G100070-1-2  
07.JAN.2013 REV.001  
32/36  
© 2012 ROHM Co., Ltd. All rights reserved.  
TSZ2211115001  
Daattaasshheeeett  
BR93G76-3  
MSOP8  
2.9± 0.1  
(MAX 3.25 include BURR)  
+
6°  
4°  
4°  
8 7 6 5  
1
2 3 4  
1PIN MARK  
+0.05  
+0.05  
0.03  
0.145  
0.475  
S
0.22  
0.04  
0.08 S  
0.65  
(Unit : mm)  
<Tape and Reel information>  
Tape  
Embossed carrier tape  
3000pcs  
Quantity  
TR  
Direction  
of feed  
The direction is the 1pin of product is at the upper right when you hold  
reel on the left hand and you pull out the tape on the right hand  
(
)
1pin  
Direction of feed  
Reel  
Order quantity needs to be multiple of the minimum quantity.  
www.rohm.com  
TSZ02201-09190G100070-1-2  
07.JAN.2013 REV.001  
33/36  
© 2012 ROHM Co., Ltd. All rights reserved.  
TSZ2211115001  
Daattaasshheeeett  
BR93G76-3  
VSON008X2030  
2.0± 0.1  
1PIN MARK  
S
0.08 S  
1.5± 0.1  
0.5  
C0.25  
1
8
4
5
0.25  
+0.05  
0.04  
0.25  
(Unit : mm)  
<Tape and Reel information>  
Tape  
Embossed carrier tape  
4000pcs  
Quantity  
TR  
Direction  
of feed  
The direction is the 1pin of product is at the upper right when you hold  
reel on the left hand and you pull out the tape on the right hand  
(
)
Direction of feed  
1pin  
Reel  
Order quantity needs to be multiple of the minimum quantity.  
www.rohm.com  
TSZ02201-09190G100070-1-2  
07.JAN.2013 REV.001  
34/36  
© 2012 ROHM Co., Ltd. All rights reserved.  
TSZ2211115001  
Daattaasshheeeett  
BR93G76-3  
Marking Diagrams  
SOP8(TOP VIEW)  
DIP-T8 (TOP VIEW)  
Part Number Marking  
LOT Number  
Part Number Marking  
LOT Number  
9 G 7 6  
BR93G76  
1PIN MARK  
SOP-J8(TOP VIEW)  
SSOP-B8(TOP VIEW)  
Part Number Marking  
LOT Number  
Part Number Marking  
LOT Number  
9 G D  
9 G 7 6  
1PIN MARK  
1PIN MARK  
TSSOP-B8(TOP VIEW)  
TSSOP-B8J(TOP VIEW)  
Part Number Marking  
LOT Number  
Part Number Marking  
9 G 7  
6 G 3  
LOT Number  
1PIN MARK  
1PIN MARK  
MSOP8(TOP VIEW)  
VSON008X2030 (TOP VIEW)  
Part Number Marking  
LOT Number  
Part Number Marking  
LOT Number  
9 G D  
9 G 3  
9 G 7  
6 G 3  
1PIN MARK  
1PIN MARK  
www.rohm.com  
TSZ02201-09190G100070-1-2  
07.JAN.2013 REV.001  
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© 2012 ROHM Co., Ltd. All rights reserved.  
TSZ2211115001  
Daattaasshheeeett  
BR93G76-3  
Revision History  
Date  
Revision  
001  
Changes  
07.Jan.2013  
New Release  
www.rohm.com  
TSZ02201-09190G100070-1-2  
07.JAN.2013 REV.001  
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TSZ2211115001  
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Notice  
General Precaution  
1) Before you use our Products, you are requested to carefully read this document and fully understand its contents.  
ROHM shall not be in any way responsible or liable for failure, malfunction or accident arising from the use of any  
ROHM’s Products against warning, caution or note contained in this document.  
2) All information contained in this document is current as of the issuing date and subject to change without any prior  
notice. Before purchasing or using ROHM’s Products, please confirm the latest information with a ROHM sales  
representative.  
Precaution on using ROHM Products  
1) Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment,  
OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you  
intend to use our Products in devices requiring extremely high reliability (such as medical equipment, transport  
equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car  
accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or  
serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.  
Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any  
damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific  
Applications.  
2) ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor  
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate  
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which  
a failure or malfunction of our Products may cause. The following are examples of safety measures:  
[a] Installation of protection circuits or other protective devices to improve system safety  
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure  
3) Our Products are designed and manufactured for use under standard conditions and not under any special or  
extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way  
responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any  
special or extraordinary environments or conditions. If you intend to use our Products under any special or  
extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of  
product performance, reliability, etc, prior to use, must be necessary:  
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents  
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust  
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,  
H2S, NH3, SO2, and NO2  
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves  
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items  
[f] Sealing or coating our Products with resin or other coating materials  
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of  
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning  
residue after soldering  
[h] Use of the Products in places subject to dew condensation  
4) The Products are not subject to radiation-proof design.  
5) Please verify and confirm characteristics of the final or mounted products in using the Products.  
6) In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse) is applied,  
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power  
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect  
product performance and reliability.  
7) De-rate Power Dissipation (Pd) depending on Ambient temperature (Ta). When used in sealed area, confirm the actual  
ambient temperature.  
8) Confirm that operation temperature is within the specified range described in the product specification.  
9) ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in  
this document.  
Notice - Rev.004  
© 2013 ROHM Co., Ltd. All rights reserved.  
Daattaasshheeeett  
Precaution for Mounting / Circuit board design  
1) When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product  
performance and reliability.  
2) In principle, the reflow soldering method must be used; if flow soldering method is preferred, please consult with the  
ROHM representative in advance.  
For details, please refer to ROHM Mounting specification  
Precautions Regarding Application Examples and External Circuits  
1) If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the  
characteristics of the Products and external components, including transient characteristics, as well as static  
characteristics.  
2) You agree that application notes, reference designs, and associated data and information contained in this document  
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely  
responsible for it and you must exercise your own independent verification and judgment in the use of such information  
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses  
incurred by you or third parties arising from the use of such information.  
Precaution for Electrostatic  
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper  
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be  
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,  
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).  
Precaution for Storage / Transportation  
1) Product performance and soldered connections may deteriorate if the Products are stored in the places where:  
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2  
[b] the temperature or humidity exceeds those recommended by ROHM  
[c] the Products are exposed to direct sunshine or condensation  
[d] the Products are exposed to high Electrostatic  
2) Even under ROHM recommended storage condition, solderability of products out of recommended storage time period  
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is  
exceeding the recommended storage time period.  
3) Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads  
may occur due to excessive stress applied when dropping of a carton.  
4) Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of  
which storage time is exceeding the recommended storage time period.  
Precaution for Product Label  
QR code printed on ROHM Products label is for ROHM’s internal use only.  
Precaution for Disposition  
When disposing Products please dispose them properly using an authorized industry waste company.  
Precaution for Foreign Exchange and Foreign Trade act  
Since our Products might fall under controlled goods prescribed by the applicable foreign exchange and foreign trade act,  
please consult with ROHM representative in case of export.  
Precaution Regarding Intellectual Property Rights  
1) All information and data including but not limited to application example contained in this document is for reference  
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any  
other rights of any third party regarding such information or data. ROHM shall not be in any way responsible or liable  
for infringement of any intellectual property rights or other damages arising from use of such information or data.:  
2) No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any  
third parties with respect to the information contained in this document.  
Notice - Rev.004  
© 2013 ROHM Co., Ltd. All rights reserved.  
Daattaasshheeeett  
Other Precaution  
1) The information contained in this document is provided on an “as is” basis and ROHM does not warrant that all  
information contained in this document is accurate and/or error-free. ROHM shall not be in any way responsible or  
liable for any damages, expenses or losses incurred by you or third parties resulting from inaccuracy or errors of or  
concerning such information.  
2) This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.  
3) The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written  
consent of ROHM.  
4) In no event shall you use in any way whatsoever the Products and the related technical information contained in the  
Products or this document for any military purposes, including but not limited to, the development of mass-destruction  
weapons.  
5) The proper names of companies or products described in this document are trademarks or registered trademarks of  
ROHM, its affiliated companies or third parties.  
Notice - Rev.004  
© 2013 ROHM Co., Ltd. All rights reserved.  
配单直通车
BR93H46F-WE2产品参数
型号:BR93H46F-WE2
是否无铅: 不含铅
是否Rohs认证: 符合
生命周期:Active
零件包装代码:SOIC
包装说明:LEAD FREE, SOP-8
针数:8
Reach Compliance Code:compliant
ECCN代码:EAR99
HTS代码:8542.32.00.51
风险等级:5.56
Is Samacsys:N
最大时钟频率 (fCLK):2 MHz
JESD-30 代码:R-PDSO-G8
JESD-609代码:e3/e2
长度:5 mm
内存密度:1024 bit
内存集成电路类型:EEPROM
内存宽度:16
功能数量:1
端子数量:8
字数:64 words
字数代码:64
工作模式:SYNCHRONOUS
最高工作温度:125 °C
最低工作温度:-40 °C
组织:64X16
封装主体材料:PLASTIC/EPOXY
封装代码:LSOP
封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, LOW PROFILE
并行/串行:SERIAL
峰值回流温度(摄氏度):260
认证状态:Not Qualified
座面最大高度:1.6 mm
串行总线类型:MICROWIRE
最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):2.5 V
标称供电电压 (Vsup):4 V
表面贴装:YES
技术:CMOS
温度等级:AUTOMOTIVE
端子面层:TIN/TIN COPPER
端子形式:GULL WING
端子节距:1.27 mm
端子位置:DUAL
处于峰值回流温度下的最长时间:10
宽度:4.4 mm
最长写入周期时间 (tWC):5 ms
Base Number Matches:1
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