BTS7973B各脚功能电路原理芯片引脚定义引脚图及功能IC贸易商-中国IC网-芯三七

BTS 824R

Smart High-Side Power Switch

Four Channels: 4 x 90mΩ

Status Feedback

Product Summary

Package

Power SO 20

Operating Voltage

V_bb

5.5...40V

four parallel

Active channels one

On-state Resistance

Nominal load current

Current limitation

R_ON

90mΩ

4.7A

12A

22.5mΩ

19.0A

12A

I_L(NOM)

I_L(SCr)

General Description

•

N channel vertical power MOSFET with charge pump, ground referenced CMOS compatible input and

diagnostic feedback, monolithically integrated in Smart SIPMOS technology.

Providing embedded protective functions

•

Applications

•

µC compatible high-side power switch with diagnostic feedback for 12V and 24V grounded loads

All types of resistive, inductive and capacitve loads

Most suitable for loads with high inrush currents, so as lamps

Replaces electromechanical relays, fuses and discrete circuits

Basic Functions

•

Very low standby current

CMOS compatible input

Improved electromagnetic compatibility (EMC)

Fast demagnetization of inductive loads

Stable behaviour at undervoltage

Wide operating voltage range

Logic ground independent from load ground

Protection Functions

Block Diagram

•

Short circuit protection

Vbb

Overload protection

Current limitation

Thermal shutdown

IN1

ST1/2

IN2

Logic

Overvoltage protection (including load dump) with external

resistor

Channel 1

Channel 2

Load 1

Load 2

•

Reverse battery protection with external resistor

Loss of ground and loss of V_bbprotection

Electrostatic discharge protection (ESD)

IN3

ST3/4

IN4

Logic

Channel 3

Channel 4

Load 3

Diagnostic Function

•

Diagnostic feedback with open drain output

Open load detection in OFF-state

GND

Load 4

Feedback of thermal shutdown in ON-state

Infineon Technologies AG

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2003-Oct-01

BTS 824R

Functional diagram

overvoltage

protection

current limit

gate

control

+

VBB

charge

pump

internal

clamp for

logic

voltage supply

inductive load

OUT1

LOAD

IN1

temperature

sensor

reverse

battery

ESD

protection

Open load

detection

.

channel 1

ST1/2

IN2

control and protection circuit

of

channel 2

GND1/2

IN3

OUT2

OUT3

OUT4

control and protection circuit

of

channel 3

ST3/4

control and protection circuit

IN4

of

channel 4

GND3/4

Infineon Technologies AG

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2003-Oct-01

BTS 824R

Pin Definitions and Functions

Pin configuration

1,10,

11,20

Symbol Function

V Positive power supply voltage. Design the

bb

(top view)

wiring for the simultaneous max. short circuit

currents from channel 1 to 2 and also for low

thermal resistance

V

1 •

2

3

4

5

6

7

8

9

20 V

bb

GND1/2

IN1

ST1/2

IN2

GND3/4

IN3

ST3/4

IN4

19 OUT1

18 OUT1

17 OUT2

16 OUT2

15 OUT3

14 OUT3

13 OUT4

12 OUT4

3

5

7

9

IN1

IN2

Input 1,2, 3,4 activates channel 1,2,3,4 in case

of logic high signal

IN3

IN4

18,19

16,17

14,15

12,13

4

OUT1

OUT2

OUT3

OUT4

ST1/2

ST3/4

Output 1,2,3,4 protected high-side power output

of channel 1,23,4. Design the wiring for the

max. short circuit current

V

10

11 V

bb

Diagnostic feedback 1/2,3/4 of channel 1,2,3,4

open drain, low on failure

8

2

6

GND1/2 Ground of chip 1 (channel 1,2)

GND3/4 Ground of chip 2 (channel 3,4)

Infineon Technologies AG

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BTS 824R

Maximum Ratings at T_j= 25°C unless otherwise specified

Parameter

Symbol

Values

Unit

Supply voltage (overvoltage protection see page 6)

V_bb

43

36

V

Supply voltage for full short circuit protection

T_j,start=-40 ...+150°C

V

Load current (Short-circuit current, see page 6)

I_L

self-limited

60

A

V

3⁾

Load dump protection¹⁾V_LoadDump= V_A+ V_s, V_A= 13.5 V V_Loaddump

R_I²⁾= 2 Ω, t_d= 400 ms; IN= low or high,

each channel loaded with R_L= 13.5 Ω,

Operating temperature range

Storage temperature range

Power dissipation (DC)⁴⁾

T_j

T_stg

-40 ...+150

-55 ...+150

°C

W

T_a= 25°C: P_tot

T_a= 85°C:

3.6

1.9

(all channels active)

Maximal switchable inductance, single pulse

V_bb=12V, T_j,start=150°C⁴⁾, see diagrams on page 10

7.9

3.7

1.8

mH

kV

I_L= 4.7 A, E_AS= 120 mJ, 0Ω

I_L= 9.5 A, E_AS= 230 mJ, 0Ω

I_L= 19.0 A, E_AS= 450 mJ, 0Ω four parallel channels:

one channel: Z_L

two parallel channels:

Electrostatic discharge capability (ESD)

(Human Body Model)

out to all other pins shorted:

acc. MIL-STD883D, method 3015.7 and ESD assn. std. S5.1-1993

R=1.5kΩ; C=100pF

IN:

V_ESD

1.0

4.0

8.0

ST:

Input voltage (DC) see internal circuit diagram page 9

Current through input pin (DC)

V_IN

I_IN

-10 ... +16

±0.3

V

mA

Pulsed current through input pin⁵⁾

Current through status pin (DC)

I_INp

I_ST

±5.0

1)

Supply voltages higher than V_bb(AZ)require an external current limit for the GND and status pins (a 150Ω

resistor for the GND connection is recommended.

2)

3)

4)

R = internal resistance of the load dump test pulse generator

I

V_{Load dump}is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839

Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm²(one layer, 70µm thick) copper area for V

bb

connection. PCB is vertical without blown air. See page 14

only for testing

5)

Infineon Technologies AG

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2003-Oct-01

BTS 824R

Thermal Characteristics

Parameter and Conditions

Symbol

Values

Unit

min

--

typ

max

Thermal resistance

junction - soldering point⁶⁾⁷⁾

junction – ambient⁶⁾

each channel: R_thjs

R_thja

K/W

--

5

@ 6 cm²cooling area

one channel active:

all channels active:

42

34

--

Electrical Characteristics

Parameter and Conditions, each of the four channels Symbol

Values

Unit

at Tj = -40...+150°C, V = 12 V unless otherwise specified

bb

min

typ

max

Load Switching Capabilities and Characteristics

On-state resistance (V to OUT); I = 2 A

L

bb

each channel,

--

mΩ

T_j= 25°C: R_ON

T_j= 150°C:

70

140

90

180

--

two parallel channels, T_j= 25°C:

four parallel channels, T_j= 25°C:

see diagram, page 11

35

45

17.5 22.5

Nominal load current

one channel active: I_L(NOM)

two parallel channels active:

four parallel channels active:

3.7

7.4

4.7

9.5

--

A

14.8 19.0

6)

Device on PCB , T = 85°C, T ≤ 150°C

a

j

Output current while GND disconnected or pulled up⁸⁾;

I_L(GNDhigh)

--

2

mA

V

= 32 V, V = 0,

IN

bb

see diagram page 9

Turn-on time⁹⁾

Turn-off time

R_L= 12 Ω

IN

to 90% V_OUT

to 10% V_OUT: t_off

:

t_on

--

100

250

270

µs

)

Slew rate on⁹

Slew rate off⁹

10 to 30% V_OUT, R_L= 12 Ω: dV/dt_on

70 to 40% V_OUT, R_L= 12 Ω: -dV/dt_off

0.2

--

1.0 V/µs

1.1 V/µs

)

Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm²(one layer, 70µm thick) copper area for V

connection. PCB is vertical without blown air. See page 14

Soldering point: upper side of solder edge of device pin 15. See page 14

not subject to production test, specified by design

6

)

bb

7)

8)

9)

See timing diagram on page 12.

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2003-Oct-01

BTS 824R

Parameter and Conditions, each of the four channels Symbol

Values

Unit

at Tj = -40...+150°C, V = 12 V unless otherwise specified

bb

min

typ

max

Operating Parameters

Operating voltage

Undervoltage switch off¹⁰⁾

V_bb(on)

5.5

--

40

V

T_j=-40°C...25°C: V_{bb(u so)}

T_j=125°C:

4.5

--

-- 4.5¹¹⁾

Overvoltage protection¹²⁾

I_bb= 40 mA

V_bb(AZ)

41

47

52

V

Standby current¹³⁾

V_IN= 0; see diagram page 11

T_j=-40°C...25°C: I_bb(off)

T_j=150°C:

--

9

--

20

30

µA

T_j=125°C:

-- 20¹¹⁾

Off-State output current (included in I_bb(off)

V_IN= 0; each channel

)

I_L(off)

--

1

5

µA

Operating current ¹⁴⁾, V_IN= 5V,

I_GND

--

0.6

2.4

1.2

4.8

mA

I_GND= I_GND1+ I_GND2

,

one channel on:

all channels on:

Protection Functions¹⁵⁾

Current limit, V

= 0V, (see timing diagrams, page 12)

out

_Tj=-40°C: I_L(lim)

_Tj=25°C:

--

9

--

15

--

23

--

A

_Tj=+150°C:

--

Repetitive short circuit current limit,

T_j= T_jt

each channel I_L(SCr)

two,three or four parallel channels

--

12

--

(see timing diagrams, page 12)

Initial short circuit shutdown time

out

T_j,start=25°C: t_off(SC)

--

2

--

ms

V

= 0V

(see timing diagrams on page 12)

Output clamp (inductive load switch off)¹⁶⁾

V_ON(CL)

41

47

52

at V

ON(CL)

= V - V , I = 40 mA

bb OUT L

Thermal overload trip temperature

Thermal hysteresis

T_jt

150

--

°C

K

∆T_jt

10

10)

is the voltage, where the device doesn´t change it´s switching condition for 15ms after the supply voltage

falling below Vbb(on)

11)

12)

not subject to production test, specified by design

Supply voltages higher than V_bb(AZ)require an external current limit for the GND and status pins (a 150Ω

resistor for the GND connection is recommended). See also V

in table of protection functions and

ON(CL)

circuit diagram on page 9.

Measured with load; for the whole device; all channels off

13)

14)

15)

Add I , if I > 0

ST

Integrated protection functions are designed to prevent IC destruction under fault conditions described in the

data sheet. Fault conditions are considered as "outside" normal operating range. Protection functions are not

designed for continuous repetitive operation.

16)

If channels are connected in parallel, output clamp is usually accomplished by the channel with the lowest

V

ON(CL)

Infineon Technologies AG

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2003-Oct-01

BTS 824R

Parameter and Conditions, each of the four channels Symbol

Values

Unit

at Tj = -40...+150°C, V = 12 V unless otherwise specified

bb

min

typ

max

Reverse Battery

Reverse battery voltage ¹⁷⁾

-V_bb

--

32

--

V

Drain-source diode voltage (V > V

)

-V_ON

600

mV

out

bb

_IL=-2.0A, Tj =+150°C

Diagnostic Characteristics

Open load detection voltage

V _OUT(OL)

1.7

2.5

2.8

4.0

6.0

V

1

Input and Status Feedback¹⁸⁾

Input resistance

(see circuit page 9)

R_I

kΩ

Input turn-on threshold voltage

Input turn-off threshold voltage

Input threshold hysteresis

Status change after positive input slope¹⁹⁾

with open load

V_IN(T+)

V_IN(T-)

--

1.0

--

2.5

--

V

∆ V_IN(T)

t_d(STon)

0.2

10

--

V

--

20

µs

Status change after positive input slope¹⁹⁾

with overload

t_d(STon)

t_d(SToff)

30

--

500

20

µs

Status change after negative input slope

with open load

Status change after negative input slope¹⁹⁾

--

with overtemperature

Off state input current

On state input current

Status output (open drain)

Zener limit voltage

V_IN= 0.4 V: I_IN(off)

V_IN= 5 V: I_IN(on)

5

--

20

60

µA

10

35

I_ST= +1.6 mA: V_ST(high)

I_ST= +1.6 mA: V_ST(low)

5.4

--

0.6

V

ST low voltage

17)

Requires a 150 Ω resistor in GND connection. The reverse load current through the intrinsic drain-source

diode has to be limited by the connected load. Power dissipation is higher compared to normal operating

conditions due to the voltage drop across the drain-source diode. The temperature protection is not active

during reverse current operation! Input and Status currents have to be limited (see max. ratings page 4 and

circuit page 9).

18)

19)

If ground resistors R

are used, add the voltage drop across these resistors.

GND

not subject to production test, specified by design

Infineon Technologies AG

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BTS 824R

Truth Table

IN1

IN3

IN2

IN4

OUT1

OUT3

OUT2

OUT4

ST1/2

ST3/4

Channel 1 and 2

Channel 3 and 4

Chip 1

Chip 2

(equivalent to channel 1 and 2)

Normal operation

L

H

L

H

L

H

X

L

H

Z

L

H

L

H

X

H

20)

Open load

Channel 1 (3)

L

H

20)

Channel 2 (4)

both channel

X

L

H

X

Z

H

L

H

L

H

L

H

L

Overtemperature

L

X

H

L

H

X

L

H

X

L

X

L

X

L

Channel 1 (3)

Channel 2 (4)

H

L = "Low" Level

H = "High" Level

X = don't care

Z = high impedance, potential depends on external circuit

Status signal valid after the time delay shown in the timing diagrams

Parallel switching of channel 1 and 2 (also channel 3 and 4) is easily possible by connecting the inputs and

outputs in parallel (see truth table). If switching channel 1 to 4 in parallel, the status outputs ST1/2 and ST3/4

have to be configured as a 'Wired OR' function with a single pull-up resistor.

Terms

I

bb

V

ON1

V

ON3

Leadframe

bb

V

ON2

ON4

I

IN1

IN2

IN3

IN4

V

bb

3

7

9

I

IN1

IN3

IN4

L1

14

15

L3

18

19

OUT1

OUT2

OUT3

OUT4

5

PROFET

Chip 2

IN2

I

12

13

Chip 1

L2

L4

16

17

I

ST3/4

ST1/2

4

8

ST1/2

ST3/4

V

GND1/2

2

GND3/4

6

V

ST3/4

IN1

IN3

IN2

IN4

ST1/2

V

OUT1

OUT3

V

OUT4

V

I

OUT2

GND1/2

GND3/4

R

GND1/2

GND3/4

Leadframe (V ) is connected to pin 1,10,11,20

bb

External R

optional; two resistors R

, R

GND1

=150 Ω or a single resistor R =75 Ω for reverse

GND

GND2

battery protection up to the max. operating voltage.

20)

L, if potential at the Output exceeds the OpenLoad detection voltage

Infineon Technologies AG

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2003-Oct-01

BTS 824R

Overvolt. and reverse batt. protection

Input circuit (ESD protection), IN1 to IN4

+ 5V

+ V

bb

R

I

R

IN

ST

V

Z2

R

I

IN

ESD-ZD_I

Logic

I

ST

OUT

R

GND

ST

V

Z1

The use of ESD zener diodes as voltage clamp at DC

conditions is not recommended.

GND

R

Load

R

GND

Signal GND

Load GND

Status output, ST1/2 or ST3/4

V

Z1

= 6.1 V typ., V = 47 V typ., R

= 150 Ω,

GND

Z2

R

= 15 kΩ, R = 4.0 kΩ typ.

I

ST

+5V

In case of reverse battery the load current has to be

limited by the load. Temperature protection is not

active

R

ST(ON)

ST

Open-load detection, OUT1...4

ESD-

ZD

OFF-state diagnostic condition:

GND

Open Load, if V

> 3 V typ.; IN low

OUT

ESD-Zener diode: 6.1 V typ., max 0.3 mA; R

ST(ON)

< 375 Ω

at 1.6 mA. The use of ESD zener diodes as voltage clamp at

DC conditions is not recommended.

V

bb

R

EXT

Inductive and overvoltage output clamp,

OUT1...4

OFF

V

OUT

+V

bb

Open load

detection

V

Logic

unit

Z

V

ON

Signal GND

OUT

GND disconnect

Power GND

V

ON

clamped to V = 47 V typ.

ON(CL)

V

bb

IN

OUT

PROFET

ST

GND

V

bb

IN

ST

GND

Any kind of load. In case of IN=high is V

OUT

≈ V -V .

IN IN(T+)

Due to V

> 0, no V = low signal available.

ST

GND

Infineon Technologies AG

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2003-Oct-01

BTS 824R

Inductive load switch-off energy

dissipation

GND disconnect with GND pull up

E

bb

V

E

bb

IN

AS

E

Load

L

OUT

PROFET

V

bb

IN

ST

GND

OUT

PROFET

L

=

ST

V

GND

V

IN ST

GND

bb

Z

L

{

E

R

L

Any kind of load. If V

> V - V device stays off

IN IN(T+)

> 0, no V = low signal available.

ST

GND

Due to V

GND

Energy stored in load inductance:

2

L

1

E = ^/·L·I

V

disconnect with energized inductive

L

2

bb

load

While demagnetizing load inductance, the energy

dissipated in PROFET is

E

= E_bb+ E_L- E_R= V_ON(CL)·i (t) dt,

AS

L

V

high

bb

IN

with an approximate solution for R > 0Ω:

L

OUT

PROFET

I ·L

L

2·R

I ·R

L L

OUT(CL)

E

AS

=

(V +|V

|) ln (1+

OUT(CL)

)

bb

|V

|

ST

L

GND

Maximum allowable load inductance for

4)

a single switch off (one channel)

V

bb

L = f (I ); T

= 150°C, V = 12 V, R = 0 Ω

L

j,start

bb L

For inductive load currents up to the limits defined by Z_L

(max. ratings and diagram on page 10) each switch is

Z [mH]

L

1000

100

10

protected against loss of V

.

bb

Consider at your PCB layout that in the case of Vbb dis-

connection with energized inductive load all the load current

flows through the GND connection.

1

2

3

4

5

6

7

8

9

10 11

I

[A]

L

Infineon Technologies AG

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2003-Oct-01

BTS 824R

Typ. on-state resistance

R

ON

= f (V ,T ); I = 2 A, IN = high

L

bb j

R

[mOhm]

ON

Tj = 150°C

160

120

80

40

0

25°C

-40°C

5

7

9

11

30

40

V

bb

[V]

Typ. standby current

I

= f (T ); V = 9...34 V, IN1,2,3,4 = low

bb

bb(off)

j

I

[µA]

bb(off)

45

40

35

30

25

20

15

10

5

0

-50

0

50

100

150

200

T [°C]

j

Infineon Technologies AG

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2003-Oct-01

BTS 824R

Timing diagrams

All channels are symmetric and consequently the diagrams are valid for channel 1 to

channel 4

Figure 2b: Switching a lamp:

Figure 1a: V turn on:

bb

IN1

IN

IN2

V

ST

V

bb

V

OUT1

OUT

V

OUT2

ST1 open drain

ST2 open drain

I

L

t

Figure 2a: Switching a resistive load,

turn-on/off time and slew rate definition:

Figure 3a: Turn on into short circuit:

shut down by overtemperature, restart by cooling

IN

IN1

other channel: normal operation

V_OUT

I

L1

90%

t

dV/dtoff

on

I

L(lim)

I

L(SCr)

t

dV/dton

off

10%

t

off(SC)

I_L

ST

t

Heating up of the chip may require several milliseconds, depending

on external conditions

Infineon Technologies AG

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2003-Oct-01

BTS 824R

Figure 3b: Turn on into short circuit:

Figure 5a: Open load: detection in OFF-state, turn

shut down by overtemperature, restart by cooling

(two parallel switched channels 1 and 2)

on/off to open load

Open load of channel 1; other channels normal

operation

IN1/2

IN1

I

+ I

L1 L2

V

OUT1

2xI

L(lim)

I

L1

I

L(SCr)

ST

t

off(SC)

ST1/2

10µs

500µs

t

ST1 and ST2 have to be configured as a 'Wired OR' function

ST1/2 with a single pull-up resistor.

Figure 6a: Status change after, turn on/off to

overtemperature

Overtemperature of channel 1; other channels normal

operation

Figure 4a: Overtemperature:

Reset if T <T

j

jt

IN1

ST

IN

ST

30µs

20µs

V

OUT

T

J

t

Infineon Technologies AG

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2003-Oct-01

BTS 824R

Package and Ordering Code

Published by

Standard: P-DSO-20-12 ( Power SO 20 )

Infineon Technologies AG,

St.-Martin-Strasse 53,

D-81669 München

Sales Code

BTS 824R

Ordering Code

Q67060-S7027

All dimensions in millimetres

Attention please!

The information herein is given to describe certain

components and shall not be considered as a guarantee of

characteristics.

Terms of delivery and rights to technical change reserved.

We hereby disclaim any and all warranties, including but not

limited to warranties of non-infringement, regarding circuits,

descriptions and charts stated herein.

Infineon Technologies is an approved CECC manufacturer.

Information

For further information on technology, delivery terms and

conditions and prices please contact your nearest Infineon

Technologies Office in Germany or our Infineon

Technologies Representatives worldwide (see address list).

Warnings

Definition of soldering point with temperature T :

s

upper side of solder edge of device pin 15.

Due to technical requirements components may contain

dangerous substances. For information on the types in

question please contact your nearest Infineon Technologies

Office.

Pin 15

Infineon Technologies Components may only be used in life-

support devices or systems with the express written approval

of Infineon Technologies, if a failure of such components can

reasonably be expected to cause the failure of that life-

support device or system, or to affect the safety or

Printed circuit board (FR4, 1.5mm thick, one layer

70µm, 6cm²active heatsink area) as a reference for

max. power dissipation P , nominal load current

effectiveness of that device or system. Life support devices

or systems are intended to be implanted in the human body,

or to support and/or maintain and sustain and/or protect

human life. If they fail, it is reasonable to assume that the

health of the user or other persons may be endangered.

tot

I

and thermal resistance R

L(NOM)

thja

Frontside:

Backside:

Infineon Technologies AG

14

2003-Oct-01

型号:	BTS824R
是否Rohs认证：	不符合
生命周期：	Obsolete
零件包装代码：	SOIC
包装说明：	POWER, SO-20
针数：	20
Reach Compliance Code：	compliant
ECCN代码：	EAR99
HTS代码：	8542.39.00.01
风险等级：	8.68
内置保护：	TRANSIENT; OVER CURRENT; OVER VOLTAGE; THERMAL; UNDER VOLTAGE
驱动器位数：	4
接口集成电路类型：	BUFFER OR INVERTER BASED PERIPHERAL DRIVER
JESD-30 代码：	R-PDSO-G20
长度：	15.9 mm
湿度敏感等级：	3
功能数量：	2
端子数量：	20
最高工作温度：	150 °C
最低工作温度：	-40 °C
输出电流流向：	SINK
标称输出峰值电流：	19 A
封装主体材料：	PLASTIC/EPOXY
封装代码：	HSOP
封装等效代码：	SOP20,.56
封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE, HEAT SINK/SLUG
电源：	12 V
认证状态：	Not Qualified
座面最大高度：	3.5 mm
子类别：	Peripheral Drivers
最大供电电压：	40 V
最小供电电压：	5.5 V
标称供电电压：	12 V
表面贴装：	YES
技术：	MOS
温度等级：	AUTOMOTIVE
端子形式：	GULL WING
端子节距：	1.27 mm
端子位置：	DUAL
断开时间：	270 µs
接通时间：	250 µs
宽度：	11 mm
Base Number Matches：	1

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