深圳市轩成微电子有限公司

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Single power supply operation

– Full voltage range: 2.7 to 3.6V read and write operations

 Memory architecture

– Uniform 64-kB sectors

– Top or bottom parameter block (Two 64-kB sectors (top

or bottom) broken down into sixteen 4-kB sub-sectors

each)

– 256-byte page size

– Backward compatible with the S25FL064A device

 Program

– Page Program (up to 256 bytes) in 1.5 ms (typical)

– Program operations are on a page by page basis

– Accelerated programming mode via 9V W#/ACC pin

– Quad Page Programming

 Erase

– Bulk erase function

– Sector erase (SE) command (D8h) for 64-kB sectors

– Sub-sector erase (P4E) command (20h) for 4-kB sectors

– Sub-sector erase (P8E) command (40h) for 8-kB sectors

 Cycling endurance

– 100,000 cycles per sector typical

 Data retention

– 20 years typical

 Device ID

– JEDEC standard two-byte electronic signature

– RES command one-byte electronic signature for backward

compatibility

 One time programmable (OTP) area for permanent, secure

identification; can be programmed and locked at the factory

or by the customer