- Program Chair:
- Lennart Lindh
The FPGAworld program committee welcomes you to the 9th FPGAworld conference. This year, the conference is divided in three places, Copenhagen (Denmark), Stockholm (Sweden) and Tampere (Finland). Tampere is a new location for FPGAworld; earlier FPGAworld has been organized in India (Udaipur), Germany (Munich) and Sweden (Lund).
Proceeding Downloads
Reconfigure router design and evaluation for the FPGA-friendly SoCWire network-on-chip
This paper extends the System-on-Chip Wire (SoCWire) Network-On-Chip (NoC) with a reconfigurable router suitable for building FPGA-based NoC. Different configurations of the SoCWireRouter with a varying number of local and multi-dimensional ports have ...
A tag-based dynamic memory map architecture in VHDL
This paper presents the architecture of a small, generic and proven dynamic memory map (DMM) firmware solution for VHDL developers. The dynamic memory map allows digital designers to construct dynamic memory map structures, where registers can be added ...
Implementation of genetic algorithms using FPGA technology
The design presented in this paper is a Genetic Algorithm (GA) written in Vhsic Hardware Description Language (VHDL) and intended for a hardware implementation which is used for real time applications. The hardware implementation exploits the ...
Interface tasks oriented 8-bit soft-core processor
The utilization of embedded soft-core processors in electronic systems offers multiple benefits such as better performance, cost reduction, flexibility and design innovation. This paper describes the architecture and implementation of an 8-bit embedded ...
MCAPI abstraction on FPGA based SoC design
FPGAs are traditionally designed with RTL-level IP-block descriptions. Many FPGA designs include several synthesizable processors and SW executables are mapped to them after a separate software development process. The tools help connecting physical ...
Behavioral specification diversification for logic controllers implemented in FPGA devices
This paper deals with a new approach to logic controllers developing process. Classic development approach assumes the use of only one chosen model for the purpose of a logic controller specification. The proper choice of a model is a critical issue ...
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Acceptance Rates
| Year | Submitted | Accepted | Rate |
|---|---|---|---|
| FPGAworld '15 | 6 | 4 | 67% |
| Overall | 6 | 4 | 67% |