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Schedule Synthesis for Halide Pipelines through Reuse Analysis

Published: 18 April 2019 Publication History
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  • Abstract

    Efficient code generation for image processing applications continues to pose a challenge in a domain where high performance is often necessary to meet real-time constraints. The inherently complex structure found in most image-processing pipelines, the plethora of transformations that can be applied to optimize the performance of an implementation, as well as the interaction of these optimizations with locality, redundant computation and parallelism, can be indentified as the key reasons behind this issue. Recent domain-specific languages (DSL) such as the Halide DSL and compiler attempt to encourage high-level design-space exploration to facilitate the optimization process. We propose a novel optimization strategy that aims to maximize producer-consumer locality by exploiting reuse in image-processing pipelines. We implement our analysis as a tool that can be used alongside the Halide DSL to automatically generate schedules for pipelines implemented in Halide and test it on a variety of benchmarks. Experimental results on three different multi-core architectures show an average performance improvement of 40% over the Halide Auto-Scheduler and 75% over a state-of-the art approach that targets the PolyMage DSL.

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    Cited By

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    • (2024)SlidingConv: Domain-Specific Description of Sliding Discrete Cosine Transform Convolution for HalideIEEE Access10.1109/ACCESS.2023.334566012(7563-7583)Online publication date: 2024
    • (2022)ACM Transactions on Graphics10.1145/3528223.353012541:4(1-24)Online publication date: 22-Jul-2022
    • (2022)A graph neural network-based performance model for deep learning applicationsProceedings of the 6th ACM SIGPLAN International Symposium on Machine Programming10.1145/3520312.3534863(11-20)Online publication date: 13-Jun-2022
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    Information & Contributors

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    Published In

    cover image ACM Transactions on Architecture and Code Optimization
    ACM Transactions on Architecture and Code Optimization  Volume 16, Issue 2
    June 2019
    317 pages
    ISSN:1544-3566
    EISSN:1544-3973
    DOI:10.1145/3325131
    Issue’s Table of Contents
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    Association for Computing Machinery

    New York, NY, United States

    Publication History

    Published: 18 April 2019
    Accepted: 01 January 2019
    Revised: 01 December 2018
    Received: 01 July 2018
    Published in TACO Volume 16, Issue 2

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    Author Tags

    1. Halide
    2. Loop optimizations
    3. compiler optimizations
    4. image-processing pipelines

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    Cited By

    View all
    • (2024)SlidingConv: Domain-Specific Description of Sliding Discrete Cosine Transform Convolution for HalideIEEE Access10.1109/ACCESS.2023.334566012(7563-7583)Online publication date: 2024
    • (2022)ACM Transactions on Graphics10.1145/3528223.353012541:4(1-24)Online publication date: 22-Jul-2022
    • (2022)A graph neural network-based performance model for deep learning applicationsProceedings of the 6th ACM SIGPLAN International Symposium on Machine Programming10.1145/3520312.3534863(11-20)Online publication date: 13-Jun-2022
    • (2021)Efficient automatic scheduling of imaging and vision pipelines for the GPUProceedings of the ACM on Programming Languages10.1145/34854865:OOPSLA(1-28)Online publication date: 20-Oct-2021
    • (2021)Thallo – Scheduling for High-Performance Large-Scale Non-Linear Least-Squares SolversACM Transactions on Graphics10.1145/345398640:5(1-14)Online publication date: 24-Sep-2021
    • (2020)Schedule Synthesis for Halide Pipelines on GPUsACM Transactions on Architecture and Code Optimization10.1145/340611717:3(1-25)Online publication date: 3-Aug-2020
    • (2019)Learning to optimize halide with tree search and random programsACM Transactions on Graphics10.1145/3306346.332296738:4(1-12)Online publication date: 12-Jul-2019

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