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A data acquisition framework in Python and Verilog.

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Basil

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Basil is a modular data acquisition system and system testing framework in Python.

It also provides generic FPGA firmware modules for different hardware platforms and drivers for wide range of lab appliances.

Features

Firmware:
  • very simple single master bus definition
  • multiple basic modules (SPI, SEQ, GPIO, I2C, JTAG)
  • multiple interfaces (UART, USB2, USB3, Ethernet)
Software:
  • layer structure following hardware
  • generation based on yaml file
  • register abstract layer (RAL)
  • simulator interface allows software test against simulated RTL (thanks to cocotb)

Installation

Clone the repository to get a copy of the source code (for developers):

git clone https://github.com/SiLab-Bonn/basil.git
cd basil
pip install -e .

or install via PyPI into the Python's site-packages folder (for non-developers):

pip install basil_daq==version

where version is a version number (e.g., 3.0.1)

or install from git, when no PyPI package is available (for non-developers):

pip install git+https://github.com/SiLab-Bonn/basil.git@branch

where branch is a branch name or tag (e.g., master or v3.0.1).

Check .travis.yml for installation/testing hints.

Support

Please use GitHub's issue tracker for bug reports/feature requests/questions.

For CERN users: Feel free to subscribe to the basil mailing list

Documentation

Documentation can be found under: https://basil.rtfd.org

Example Projects:

  • pyBAR - Bonn ATLAS Readout in Python
  • MCA - Multi Channel Analyzer
  • fe65_p2 - DAQ for FE65P2 prototype

License

If not stated otherwise.

Host Software:
The host software is distributed under the BSD 3-Clause ("BSD New" or "BSD Simplified") License.
FPGA Firmware:
The FPGA code is distributed under the GNU Lesser General Public License, version 3.0 (LGPLv3).

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A data acquisition framework in Python and Verilog.

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  • Python 53.0%
  • Verilog 44.9%
  • C++ 1.9%
  • SystemVerilog 0.2%