An Open Workflow to Build Custom SoCs and run Deep Models at the Edge

Project for building a replay/metadata infrastructure for Super Smash Bros Melee

Python Tool for UVM Testbench Generation

Official repository for Mandelbulber v2

Extensions for the built-in LSP support in Neovim for eclipse.jdt.ls

VimTeX: A modern Vim and neovim filetype plugin for LaTeX files.

[FPGA 2022, Best Paper Award] Parallel placement and routing of Vivado HLS dataflow designs.

Realtek 802.11n WLAN Adapter Linux driver

RISC-V Linux SoC, marchID: 0x2b

RapidLayout: Fast Hard Block Placement of FPGA-Optimized Systolic Arrays using Evolutionary Algorithms

Xilinx Tcl Store

🐬 A comprehensive tutorial on getting started with Docker!

Python interface to FPGA interchange format

An Open-Source Analytical Placer for Large Scale Heterogeneous FPGAs using Deep-Learning Toolkit

Experimental flows using nextpnr for Xilinx devices

EDIF netlist checker tool

Build Customized FPGA Implementations for Vivado

AMF-Placer 2.0: An open-source timing-driven analytical mixed-size FPGA placer of heterogeneous resources (LUT/FF/LUTRAM/MUX/CARRY/DSP/BRAM...)

Brood War API

A massively parallel, optimal functional runtime in Rust

A massively parallel, high-level programming language

Run Windows apps such as Microsoft Office/Adobe in Linux (Ubuntu/Fedora) and GNOME/KDE as if they were a part of the native OS, including Nautilus integration.

OpenROAD's unified application implementing an RTL-to-GDS Flow. Documentation at https://openroad.readthedocs.io/en/latest/

Python Productivity for ZYNQ

Package to call Python functions from the Julia language

Example designs showing different ways to use F4PGA toolchains.

Verilog to Routing -- Open Source CAD Flow for FPGA Research