CD4051B, CD4052B, CD4053B
Data sheet acquired from Harris Semiconductor
SCHS047G
August 1998 - Revised October 2003
The CD4051B is a single 8-Channel multiplexer having three
binary control inputs, A, B, and C, and an inhibit input. The
three binary signals select 1 of 8 channels to be turned on,
and connect one of the 8 inputs to the output.
Features
• Wide Range of Digital and Analog Signal Levels
- Digital . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3V to 20V
- Analog. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ≤20V
P-P
The CD4052B is a differential 4-Channel multiplexer having
two binary control inputs, A and B, and an inhibit input. The
two binary input signals select 1 of 4 pairs of channels to be
turned on and connect the analog inputs to the outputs.
• Low ON Resistance, 125Ω (Typ) Over 15V
Range for V -V = 18V
Signal Input
[ /Title
(CD405
1B,
CD4052
B,
CD4053
B)
/Sub-
P-P
DD EE
• High OFF Resistance, Channel Leakage of ±100pA (Typ)
at V -V = 18V
DD EE
The CD4053B is a triple 2-Channel multiplexer having three
separate digital control inputs, A, B, and C, and an inhibit
input. Each control input selects one of a pair of channels
which are connected in a single-pole, double-throw
configuration.
• Logic-Level Conversion for Digital Addressing Signals of
3V to 20V (V -V = 3V to 20V) to Switch Analog
DD SS
Signals to 20V
(V -V = 20V)
P-P DD EE
• Matched Switch Characteristics, r
ON
= 5Ω (Typ) for
V
-V = 15V
DD EE
When these devices are used as demultiplexers, the
“CHANNEL IN/OUT” terminals are the outputs and the
“COMMON OUT/IN” terminals are the inputs.
ject
• Very Low Quiescent Power Dissipation Under All Digital-
Control Input and Supply Conditions, 0.2µW (Typ) at
(CMOS
Analog
Multi-
plex-
ers/Dem
ultiplex-
ers with
Logic
Level
Conver-
sion)
V
-V = V -V = 10V
DD SS DD EE
Ordering Information
• Binary Address Decoding on Chip
TEMP. RANGE
o
• 5V, 10V, and 15V Parametric Ratings
PART NUMBER
( C)
PACKAGE
• 100% Tested for Quiescent Current at 20V
CD4051BF3A, CD4052BF3A,
CD4053BF3A
-55 to 125
16 Ld CERAMIC
DIP
• Maximum Input Current of 1µA at 18V Over Full Package
Temperature Range, 100nA at 18V and 25 C
o
CD4051BE, CD4052BE,
CD4053BE
-55 to 125
-55 to 125
16 Ld PDIP
• Break-Before-Make Switching Eliminates Channel
Overlap
CD4051BM, CD4051BMT,
CD4051BM96
16 Ld SOIC
CD4052BM, CD4052BMT,
CD4052BM96
CD4053BM, CD4053BMT,
CD4053BM96
Applications
/Author
()
• Analog and Digital Multiplexing and Demultiplexing
• A/D and D/A Conversion
• Signal Gating
/Key-
words
(Harris
Semi-
conduc-
tor,
CD4051BNSR, CD4052BNSR,
CD4053BNSR
-55 to 125
-55 to 125
16 Ld SOP
CD4051BPW, CD4051BPWR,
CD4052BPW, CD4052BPWR
CD4053BPW, CD4053BPWR
16 Ld TSSOP
CMOS Analog Multiplexers/Demultiplexers
with Logic Level Conversion
NOTE: When ordering, use the entire part number. The suffixes 96
and R denote tape and reel. The suffix T denotes a small-quantity
reel of 250.
The CD4051B, CD4052B, and CD4053B analog multiplexers
CD4000 are digitally-controlled analog switches having low ON
impedance and very low OFF leakage current. Control of
analog signals up to 20V
can be achieved by digital
P-P
signal amplitudes of 4.5V to 20V (if V -V
= 3V, a
DD SS
V
-V of up to 13V can be controlled; for V -V level
DD EE DD EE
differences above 13V, a V -V
of at least 4.5V is
DD SS
required). For example, if V = +4.5V, V
= 0V, and
SS
DD
= -13.5V, analog signals from -13.5V to +4.5V can be
V
EE
controlled by digital inputs of 0V to 5V. These multiplexer
circuits dissipate extremely low quiescent power over the
full V -V
DD SS
and V -V supply-voltage ranges,
DD EE
independent of the logic state of the control signals. When
a logic “1” is present at the inhibit input terminal, all
channels are off.
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Copyright © 2003, Texas Instruments Incorporated
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