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产品型号BD8184MUV-E2的概述

芯片BD8184MUV-E2的概述 芯片BD8184MUV-E2是一款高性能的电源管理集成电路,主要用于各类消费电子产品和工业设备中的线性稳压和电源管理。该芯片由日本的ROHM Semiconductor公司设计和生产。ROHM在电源管理解决方案方面享有良好的声誉,这款芯片的设计旨在提高设备的效率和可靠性。 BD8184MUV-E2采用了多种先进的电源管理技术,能够实现高达2A的输出电流,适用于5V至30V的广泛输入电压范围。该芯片具有低静态电流特性以及保护功能,使其在不同的使用环境中保持稳定的性能。该芯片的目标应用范围广泛,包括便携式设备、工业自动化系统以及各种通信设备等,为这些设备提供了稳定的电源支持。 芯片BD8184MUV-E2的详细参数 BD8184MUV-E2的技术参数和特性可以概括为以下几个方面: 1. 输入电压范围:4.5V至30V 2. 输出电压:可调(通过外部电阻设...

产品型号BD81870EFV-M的Datasheet PDF文件预览

Datasheet  
Single-chip Type with Built-in FET Switching Regulator Series  
Step-up / Inverted 2ch  
Switching Regulator  
BD81870EFV-M  
General Description  
Special Characteristics  
BD81870EFV is current mode step-up and inverted 2  
channel switching regulator with built in FET.  
Reference Accuracy  
Switching Frequency±14.3%(Ta=-40 to 105°C)  
±3%(Ta=-40 to 105°C)  
Key Specification  
Features  
Input voltage range:  
Step-up Output voltage range:  
2.5V to 5.5V  
AEC-Q100 Qualified(Note 1)  
Wide input voltage range 2.5V to 5.5V  
High Frequency 2.1MHz  
Built-in 300mΩ/22V Nch FET and 300mΩ/15.5V Pch  
FET.  
VDD x 1.24 to 18.0V  
Inverted Output voltage range:  
VDD - 13.0V to -1.0V  
Switching Frequency:  
Nch FET ON resistance:  
Pch FET ON resistance:  
2.1MHz(Typ.)  
300mΩ(Typ.)  
300mΩ(Typ.)  
Built-in 150mΩ high-side switch for boost channel  
with soft-start function  
Independent ON/OFF signal, Built-in discharge switch  
Circuits protectionOCP, SCP, OVP, UVLO, TSD  
(Note 1:Grade2)  
Operating Temperature range-40to +105℃  
Package  
W (Typ.) x D (Typ.) x H (Max.)  
6.5mm x 6.4mm x 1.00mm  
HTSSOP-B20  
Applications  
Car navigation panel, Car instrument panel  
HTSSOP-B20  
Typical Application Circuit  
TOP VIEW)  
VDD  
VOUT1  
VDDP  
VDDP  
VDDP  
HS2L  
LX2  
LX1  
DIS1  
NON1  
VREF  
N.C.  
VOUT2  
BD81870  
GNDP  
VOUT2  
DIS2  
HSWON  
SEQON  
STB1  
STB2  
VDDA  
(HTSSOP-B20)  
GNDA  
VDD  
INV2  
Figure 1. Application Circuit  
Product structure : Silicon monolithic integrated circuit This product has no designed protection against radioactive rays  
.www.rohm.com  
TSZ02201-0313AAF00650-1-2  
29.July.2016 Rev.001  
© 2016 ROHM Co., Ltd. All rights reserved.  
1/32  
TSZ22111 14 001  
 
 
 
 
 
 
 
BD81870EFV-M  
Contents  
General Description........................................................................................................................................................................1  
Features..........................................................................................................................................................................................1  
Applications ....................................................................................................................................................................................1  
Typical Application Circuit ...............................................................................................................................................................1  
Special Characteristics ...................................................................................................................................................................1  
Key Specification ............................................................................................................................................................................1  
Package..........................................................................................................................................................................................1  
Pin Configuration ............................................................................................................................................................................3  
Pin Description................................................................................................................................................................................3  
Block Diagram ................................................................................................................................................................................4  
Description of each Block ...............................................................................................................................................................5  
Absolute Maximum Ratings ............................................................................................................................................................7  
Thermal Resistance........................................................................................................................................................................8  
Recommended Operating Ranges .................................................................................................................................................8  
Electrical Characteristics.................................................................................................................................................................9  
Typical Performance Curves.........................................................................................................................................................11  
Timing Chart 1 ..............................................................................................................................................................................17  
Timing Chart 2 ..............................................................................................................................................................................18  
Application Circuite components list .............................................................................................................................................19  
Usable Component Range............................................................................................................................................................20  
Selecting Application Components ...............................................................................................................................................21  
Notice for application ....................................................................................................................................................................23  
Layout Guideline...........................................................................................................................................................................25  
Operational Notes.........................................................................................................................................................................27  
Ordering Information.....................................................................................................................................................................30  
Marking Diagram ..........................................................................................................................................................................30  
Physical Dimension, Tape and Reel Information...........................................................................................................................31  
Revision History............................................................................................................................................................................32  
www.rohm.com  
TSZ02201-0313AAF00650-1-2  
29.July.2016 Rev.001  
© 2016 ROHM Co., Ltd. All rights reserved.  
2/32  
TSZ22111 15 001  
BD81870EFV-M  
Pin Configuration  
(TOP View)  
VDDP  
VDDP  
VDDP  
HS2L  
LX2  
LX1  
DIS1  
NON1  
VREF  
N.C.  
BD81870  
GNDP  
VOUT2  
DIS2  
HSWON  
SEQON  
STB1  
STB2  
VDDA  
(HTSSOP-B20)  
GNDA  
INV2  
Figure 2. Pin Configuration  
Pin Description  
PIN No.  
SYMBOL  
FUNCTION  
PIN No.  
SYMBOL  
FUNCTION  
1
2
VDDA  
STB2  
STB1  
SEQON  
HSWON  
N.C.  
Analog Power supply pin  
Step-up DC/DC ON/OFF pin  
Inverted DC/DC ON/OFF pin  
Sequence ON/OFF pin  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
VDDP  
VDDP  
VDDP  
HS2L  
LX2  
Power supply pin  
Power supply pin  
3
Power supply pin  
4
High-side switch output pin  
Step-up DC/DC switching pin  
Step-up DC/DC GND pin  
Step-up DC/DC output sense pin  
Step-up DC/DC discharge pin  
Analog GND pin  
5
High-side switch ON/OFF pin  
6
GNDP  
VOUT2  
DIS2  
7
VREF  
NON1  
DIS1  
Inverted DC/DC reference output pin  
Inverted DC/DC feedback pin  
Inverted DC/DC discharge pin  
Inverted DC/DC switching pin  
8
9
GNDA  
INV2  
10  
LX1  
Step-up DC/DC feedback pin  
www.rohm.com  
TSZ02201-0313AAF00650-1-2  
29.July.2016 Rev.001  
© 2016 ROHM Co., Ltd. All rights reserved.  
3/32  
TSZ22111 15 001  
BD81870EFV-M  
Block Diagram  
For Analog block  
VDDA  
VDDP  
VDD  
HSWON  
SEQON  
UVLO  
TSD  
PROTECT to Control  
Control Block  
STB1  
STB2  
OCP  
VOUT1  
ERROR AMP  
NON1  
LX1  
VOUT1  
Phase  
Compensation  
CH1  
Inverting  
Timing Control  
(Current Mode)  
_______  
STB1  
SS1  
DIS1  
SS0  
SS1  
SS2  
OVP  
SS  
VREF  
SS1  
Voltage  
Reference  
OSC  
2.1 MHz  
OCP  
_______  
STB1  
High side  
switch  
SS0  
SCP  
Timer  
VOUT2  
HS2L  
LX2  
OCP  
VOUT2  
ERROR AMP  
INV2  
GNDP  
SS2  
Phase  
Compensation  
CH2  
Step up  
0.8V  
VOUT2  
DIS2  
Timing Control  
(Current Mode)  
SS2  
OVP  
GNDA  
Figure 3. Block Diagram  
www.rohm.com  
TSZ02201-0313AAF00650-1-2  
29.July.2016 Rev.001  
© 2016 ROHM Co., Ltd. All rights reserved.  
4/32  
TSZ22111 15 001  
BD81870EFV-M  
Description of each Block  
1. Control Block  
This block controls ON/OFF of each channels: Inverted DC/DC, step-up DC/DC and High-side switch channel.  
SEQON pin and HSWON pin set ON/OFF sequence.  
SEQON pin and HSWON pin must be short to VDD or GND.  
These pins are not fixed with internal pull-up or pull-down resistance.  
Control Input  
HSWON  
Output Channels  
UVLO/TSD  
internal  
Inverted  
DC/DC  
Step-up  
DC/DC  
High-side  
switch  
SEQON  
STB1  
STB2  
signal  
H
L
L
L
L
-
L
L
H
H
-
L
H
L
H
-
-
OFF  
STB1  
STB1  
OFF  
OFF  
ON  
L/H  
L/H  
L/H  
L/H  
L/H  
STB2  
L/H  
STB2  
Internal ON/OFF sequence  
Internal ON/OFF sequence  
(Note 1)  
(Note 1)  
ON  
(Note 1) refer to the item of 12. Output discharge  
2. Voltage Reference  
This block generates reference voltage for inverted and step-up channels.  
3. UVLO  
This block is for under voltage lockout protection.  
4. TSD  
This block is for protection for abnormal temperature.  
When the junction temperature exceeds 175(typ.), all output channels go shutdown. When the junction temperature falls  
below 150(typ.), the IC restarts.  
5. OSC  
This block is the oscillator for internal clock.  
6. Soft StartSS)  
This block is the circuit for preventing in-rush current by increasing DC/DC converter output gradually.  
It generates internal soft-start reference for inverted DC/DC, step-up DC/DC and high-side switch.  
7. SCP Timer  
This block is a timer-latch type short circuit protection.  
When inverted or step-up DC/DC is in operation, after 31msec (typ.) with SCP detected, all output channels go off-latch.  
When UVLO or TSD is detected, off-latch is released.  
In SEQON=L mode, when STB1 and STB2 are low, off-latch is released.  
In SEQON=H mode, when STB1 is low, off-latch is released.  
In inverted DC/DC, when NON1 pin is above error amp reference 0.0V, error amp output goes high and SCP is detected.  
In step-up DC/DC, when INV2 pin is below error amp reference 0.8V, error amp output goes high and SCP is detected.  
8. High Side Switch  
This block prevents step-up channel output to become as high as VDD level by switching off the power supply of the step-up  
channel.  
At the start-up timing of step-up channel, soft-start function of high-side switch prevents in-rush current.  
When high-side OCP is detected, high-side switch is off-latch.  
When high-side switch channel in OFF conditions, off-latch is released.  
9. ERROR AMP  
This block monitors feedback voltage. It provides voltage to control PWM.  
10. Timing Control  
This block controls DUTY by monitoring ERROR AMP output voltage.  
11. OCP  
This block prevent malfunction at over current by limiting internal FET current.  
When OCP is detected and duty is limited, Inverted DC/DC output increase or step-up DC/DC output decrease.  
So, SCP is detected and all output channels are OFF by off-latch function above.  
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BD81870EFV-M  
12. Output discharge  
Inverted DC/DC output capacitor is discharged through DIS1 pin when STB1 is low.  
The discharge function can be disabled when STB2=H in SEQON=H mode.  
The discharge function can NOT disabled in SEQON=L mode because STB2 controls ON/OFF of Step-up DC/DC.  
Step-up DC/DC output capacitor is discharged through DIS2 pin when high-side switch is OFF.  
In conditions where HSWON=H, when UVLO of VDD is released, high-side switch is ON.  
So, discharge function of step-up DC/DC output capacitor is disabled, even if step-up DC/DC is OFF.  
By cutting the route from DIS2 pin to the capacitor, discharge function can be disabled.  
OVP function is not disabled because DIS2 pin is used to monitor the output voltage.  
In this case, DIS2 pin should be shorted to GND.  
13. OVP  
By detecting high level of output voltage, this block stops switching and prevent malfunction by over voltage stress.  
In inverted DC/DC, when DIS1 pin is -14.5V (typ.) from VDDA level, switching stops.  
When DIS1 pin voltage rises, switching starts again. OVP of inverted DC/DC has hysteresis of 1.0V (typ.).  
In step-up DC/DC, when VOUT2 in is 20.5V (typ.) from GND level, switching stops.  
When VOUT2 pin voltage falls, switching starts again. OVP of step-up DC/DC has hysteresis of 1.5V (typ.).  
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BD81870EFV-M  
Absolute Maximum Ratings  
Limits  
Parameter  
Supply Voltage  
Input Voltage  
Symbol  
Unit  
MIN  
-0.3  
-0.3  
-0.3  
-0.3  
TYP  
MAX  
VDDA, VDDP  
-
-
-
-
-
-
-
-
-
-
-
-
-
7
7
7
7
V
V
STB1, STB2, SEQON, HSWON  
NON1, INV2  
VREF  
LX1  
V
V
VDDP  
-15.5  
VDDP  
+0.3  
V
VDDP  
-15.5  
VDDP  
+0.3  
DIS1  
V
HS2L  
LX2  
-0.3  
-0.3  
-0.3  
-0.3  
-40  
-55  
-
7
V
Output Voltage  
22  
V
VOUT2  
DIS2  
22  
V
22  
V
Operating Ambient  
Temperature Range  
Ta  
105  
150  
150  
Storage Temperature  
Range  
Tstg  
Maximum Continuous  
Junction Temperature  
Tjmax  
Caution: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit  
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated over  
the absolute maximum ratings.  
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BD81870EFV-M  
Thermal Resistance (Note 1)  
Thermal Resistance (Typ)  
Parameter  
Symbol  
Unit  
1s(Note 3)  
2s2p(Note 4)  
HTSSOP-B20  
Junction to Ambient  
Junction to Top Characterization Parameter(Note 2)  
θJA  
143.0  
8
26.8  
4
°C/W  
°C/W  
ΨJT  
(Note 1)Based on JESD51-2A(Still-Air)  
(Note 2)The thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of the outside  
surface of the component package.  
(Note 3)Using a PCB board based on JESD51-3.  
Layer Number of  
Measurement Board  
Material  
FR-4  
Board Size  
Single  
114.3mm x 76.2mm x 1.57mmt  
Top  
Copper Pattern  
Thickness  
Footprints and Traces  
70μm  
(Note 4)Using a PCB board based on JESD51-7.  
Layer Number of  
Material  
Board Size  
114.3mm x 76.2mm x 1.6mmt  
2 Internal Layers  
Measurement Board  
4 Layers  
FR-4  
Top  
Bottom  
Copper Pattern  
Copper Pattern  
Thickness  
Copper Pattern  
Thickness  
Thickness  
Footprints and Traces  
70μm  
74.2mm x 74.2mm  
35μm  
74.2mm x 74.2mm  
70μm  
Recommended Operating Ranges  
(Ta=-40to 105)  
Limits  
TYP  
-
Parameter  
Symbol  
Unit  
MIN  
MAX  
5.5  
Power supply voltage  
Inverted output voltage  
Step up output voltage  
VDD  
2.5  
V
V
V
-
-
VOUT1  
VOUT2  
VDD - 13  
-1.0  
18  
VDD  
x 1.24  
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BD81870EFV-M  
Electrical Characteristics  
(Unless otherwise noted, Ta=25, VDD=3.6V)  
Limits  
TYP  
Parameter  
Symbol  
Unit  
Condition  
MIN  
MAX  
Under Voltage Lockout Threshold 】  
2.1  
1.7  
2.3  
1.8  
2.5  
1.9  
V
V
VDD sweep up  
VDD sweep down  
UVLO disable voltage  
UVLO detect voltage  
Oscillator 】  
UVL_DIS  
UVL_DET  
Oscillating frequency  
LX1 Max Duty  
FOSC  
DMAX1  
DMAX2  
1.8  
80  
80  
2.1  
86  
86  
2.4  
MHz -40<Ta<105°C  
-
-
%
%
LX2 Max Duty  
Error AMP, VREF 】  
VREF- NON1  
V
0.985  
1.000  
1.015  
VREF voltage  
VREF  
feedback resistance R1B 20kΩ  
-40<Ta<105°C  
VDD=2.5 to 5.5V  
0.970  
0.788  
0.776  
1.000  
0.800  
0.800  
1.030  
0.812  
0.824  
V
V
V
VREF voltage range  
INV2 voltage  
VREF_R  
VINV  
-40<Ta<105°C  
VDD=2.5 to 5.5V  
INV2 voltage range  
VINV_R  
2.5  
2.5  
3.2  
3.2  
3.9  
3.9  
ms  
ms  
CH1 Soft start time  
TSS1  
TSS2  
CH2 Soft start time  
Internal FET 】  
LX1 PMOS ON resistance  
DIS1 discharge resistance  
NON1 discharge resistance  
VREF discharge resistance  
High-side SW ON resistance  
LX2 NMOS ON resistance  
DIS2 discharge resistance  
LX1 OCP threshold (Note 1)  
LX2 OCP threshold (Note 1)  
HS2L leak current  
RLX1  
RDIS1  
-
-
300  
100  
150  
150  
150  
300  
100  
2.4  
2.4  
0
480  
160  
240  
240  
240  
480  
160  
3.6  
3.6  
1
mΩ  
Ω
VSTB1=0V, IDIS1=-1mA  
VSTB1=0V, INON1=1mA  
VSTB1=0V, IVREF=1mA  
RNON1  
RVREF  
RHSW  
RLX2  
-
Ω
-
Ω
-
mΩ  
mΩ  
Ω
-
RDIS2  
-
VSTB2=0V, IDIS2=-1mA  
IOCP1  
1.2  
1.2  
-1  
-1  
-1  
A
IOCP2  
A
ILX_HSW  
ILK_LX1  
ILK_LX2  
µA  
µA  
µA  
LX1 leak current  
0
1
LX2 leak current  
0
1
OVP 】  
VDD  
-15.5  
VDD  
-14.5  
VDD  
-13.5  
CH1 Over voltage protection  
OVP1  
OVP2  
V
V
Monitoring DIS1  
CH2 Over voltage protection  
19  
20.5  
22  
Monitoring VOUT2  
TSD 】  
TSD Detect Temperature (Note 1) TSD_DET  
TSD Hysteresis (Note 1)  
TSD_HYS  
150  
-
175  
25  
200  
-
(Note 1) These items are not production tested, guaranteed by design and evaluation.  
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BD81870EFV-M  
Electrical Characteristics continued  
(Unless otherwise noted, Ta=25, VDD=3.6V)  
Limits  
TYP  
Parameter  
Symbol  
VH  
Unit  
V
Condition  
MIN  
MAX  
-
Control Block 】  
VDD  
x0.7  
Active  
Non-active  
-
Control  
voltage  
VDD  
x0.3  
VL  
-
-
V
STB pull down resistance  
RCTRL  
560  
800  
1040  
kΩ  
STB1, STB2  
Circuit current 】  
STB1=STB2=0V  
Standby current  
ISTB  
-
-
1
µA  
SEQON=HSWON=0V  
LX1=0V, HS2L=0V  
Standby current range  
ISTB_R  
IDD  
-
-
-
20  
µA  
µA  
-40<Ta<105°C  
STB1=STB2=3.6V  
NON1=-0.2V, INV2=1.2V  
Circuit current of operation VDD  
500  
700  
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BD81870EFV-M  
Typical Performance Curves  
(Unless otherwise noted, Ta=25, VDD=3.6V, VOUT1=-6.2V, VOUT2=6.2V)  
1.03  
1.02  
1.01  
1.00  
0.99  
0.98  
0.97  
2.4  
2.3  
2.2  
2.1  
2.0  
1.9  
1.8  
25  
25℃  
-40℃  
105℃  
105℃  
-40℃  
2
3
4
5
6
2
3
4
5
6
VDD [V]  
VDD [V]  
Figure 4. Frequency vs. VDD  
Figure 5. VREF Voltage vs. VDD  
30  
25  
20  
15  
10  
5
0.824  
0.816  
0.808  
0.800  
0.792  
0.784  
0.776  
105℃  
25℃  
-40℃  
105℃  
-40℃  
25℃  
0
2
3
4
5
6
0
1
2
3
4
5
6
7
VDD [V]  
VDD [V]  
Figure 6. INV2 Voltage vs.VDD  
Figure 7. Standby Current vs. VDD  
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BD81870EFV-M  
Typical Performance Curves  
(Unless otherwise noted, Ta=25, VDD=3.6V, VOUT1=-6.2V, VOUT2=6.2V)  
100  
STB1  
3V/div.)  
90  
80  
70  
60  
50  
LX1  
VOUT1  
5.0V  
2.5V  
3.6V  
40  
3V/div.)  
30  
20  
10  
0
I_VDD  
1
10  
100  
1000  
500mA/div.)  
OutputCurrent [mA]  
2ms/div.  
Figure 8. VOUT1 STB ON Waveform (Load 100mA)  
Figure 9. VOUT1 Efficiency vs. Output Current (VDD)  
3
2
3
2
-40℃  
3.6V  
5.5V  
1
0
1
25℃  
0
-1  
-2  
-3  
-1  
2.5V  
105℃  
-2  
-3  
1
10  
100  
1000  
1
10  
100  
1000  
OutputCurrent [mA]  
OutputCurrent [mA]  
Figure 10. VOUT1 Output Accuracy vs. Output Current  
(VDD)  
Figure 11.  
VOUT1 Output Accuracy vs. Output Current  
(Temp)  
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BD81870EFV-M  
Typical Performance Curves  
(Unless otherwise noted, Ta=25, VDD=3.6V, VOUT1=-6.2V, VOUT2=6.2V)  
VDD  
VDD  
5V/div.)  
5V/div.)  
VOUT1(AC)  
VOUT1(AC)  
200mV/div.)  
200mV/div.)  
IOUT  
IOUT  
50mA/div.)  
50mA/div.)  
50us/div.  
50us/div.  
Figure 12. VOUT1 Load Transient Response Rising  
Figure 13. VOUT1 Load Transient Response Falling  
STB1  
3V/div.)  
LX1  
VOUT1  
VDD  
LX1  
VOUT1  
5V/div.)  
3V/div.)  
I_L  
1A/div.)  
I_VDD  
2A/div.)  
5ms/div.  
5ms/div.  
Figure 14. VOUT1 Over Current Protection  
Figure 15. VOUT1 Over Voltage Protection  
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BD81870EFV-M  
Typical Performance Curves  
(Unless otherwise noted, Ta=25, VDD=3.6V, VOUT1=-6.2V, VOUT2=6.2V)  
100  
STB2  
3V/div.)  
90  
80  
70  
60  
VOUT2  
2.5V  
LX2  
3V/div.)  
3.6V  
50  
5.0V  
40  
30  
20  
10  
0
I_VDD  
1
10  
100  
1000  
500mA/div.)  
OutputCurrent [mA]  
2ms/div.  
Figure 16. VOUT2 STB ON Waveform (Load 100mA)  
Figure 17. VOUT2 Efficiency vs. Output Current (VDD)  
3
2
3
2
3.6V  
5.5V  
105℃  
25℃  
1
0
1
0
2.5V  
-40℃  
-1  
-1  
-2  
-3  
-2  
-3  
1
10  
100  
1000  
1
10  
100  
1000  
OutputCurrent [mA]  
OutputCurrent [mA]  
Figure 18. VOUT2 Output Accuracy vs. Output Current  
(VDD)  
Figure 19. VOUT2 Output Accuracy vs. Output Current  
(Temp)  
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BD81870EFV-M  
Typical Performance Curves  
(Unless otherwise noted, Ta=25, VDD=3.6V, VOUT1=-6.2V, VOUT2=6.2V)  
VDD  
VDD  
5V/div.)  
5V/div.)  
VOUT2(AC)  
VOUT2(AC)  
200mV/div.)  
200mV/div.)  
IOUT  
IOUT  
50mA/div.)  
50mA/div.)  
50us/div.  
50us/div.  
Figure 20. VOUT2 Load Transient Response Rising  
Figure 21. VOUT2 Load Transient Response Falling  
STB2  
3V/div.)  
VOUT2  
VDD  
LX2  
VOUT2  
LX2  
3V/div.)  
3V/div.)  
I_L  
500mA/div.)  
I_VDD  
500mA/div.)  
5ms/div.  
5ms/div.  
Figure 22. VOUT2 Over Current Protection  
Figure 23. VOUT2 Over Voltage Protection  
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BD81870EFV-M  
Typical Performance Curves  
(Unless otherwise noted, Ta=25, VDD=3.6V, VOUT1=-6.2V, VOUT2=6.2V)  
STB1  
STB1  
3V/div.)  
3V/div.)  
VOUT2  
VOUT2  
3V/div.)  
3V/div.)  
VOUT1  
VOUT1  
3V/div.)  
3V/div.)  
I_VDD  
I_VDD  
500mA/div.)  
500mA/div.)  
2ms/div.  
2ms/div.  
Figure 24. STB ON Waveform (SEQON=H, no load)  
Figure 25. STB OFF Waveform (SEQON=H, no load)  
VDD  
VDD  
3V/div.)  
3V/div.)  
VOUT2  
VOUT2  
3V/div.)  
3V/div.)  
VOUT1  
VOUT1  
3V/div.)  
3V/div.)  
I_VDD  
I_VDD  
500mA/div.)  
500mA/div.)  
2ms/div.  
2ms/div.  
Figure 26. VDD ON Waveform (SEQON=H, no load)  
Figure 27. VDD OFF Waveform (SEQON=H, no load)  
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BD81870EFV-M  
Timing Chart 1  
ON/OFF sequence with STB control is as follows. STB1, STB2 and VDD are controlled independently.  
When SEQON pin is L, inverted DC/DC and step-up DC/DC can be controlled independently.  
When STB1 pin is H, inverted DC/DC soft-start begins.  
When STB2 pin is H, step-up DC/DC soft-start begins.  
Step-up DC/DC soft-start can begin after 2msec (typ.) from high-side switch soft-start.  
High-side switch soft-start begins when STB2 pin is H and HSWON=L or when UVLO of VDD is released in condition where  
HSWON=H.  
In condition where HSWON=H, ON/OFF sequence is shown in red-dotted line below.  
UVLO  
UVLO  
VDD  
STB1  
VOUT1  
3.2ms  
UVLO  
UVLO  
VDD  
STB2  
VOUT2  
2.0ms 3.2ms  
Figure 28. VDDSTB, SEQON = GND  
When SEQON pin is H, inverted DC/DC and step-up DC/DC is controlled by internal sequence.  
When STB1 pin is H, inverted DC/DC soft-start begins, after step-up DC/DC soft-starts ends.  
When STB1 pin is L, step-up DC/DC is OFF, 2msec after inverted DC/DC is OFF,  
In condition where HSWON=H, ON/OFF sequence is shown in red-dotted line below.  
UVLO  
VDD  
UVLO  
STB1  
Step_up DC/DC  
OFF delay  
VOUT2  
VOUT1  
3.2ms  
2.0ms  
2.0ms 3.9ms 3.2ms  
Figure 29. VDDSTB, SEQON = VDD  
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BD81870EFV-M  
Timing Chart 2  
ON/OFF sequence with UVLO control is as follows. STB1 or STB2 are short to VDD.  
When SEQON pin is L, inverted DC/DC and step-up DC/DC can be controlled independently.  
When UVLO is released in condition where STB1 = VDD, inverted DC/DC soft-start begins.  
When UVLO is released in condition where STB2 = VDD, step-up DC/DC soft-start begins.  
Step-up DC/DC soft-start can begin after 2msec (typ.) from high-side switch soft-start.  
High-side switch soft-start begins when UVLO of VDD is released.  
UVLO  
VDD  
UVLO  
STB1  
VOUT1  
3.2ms  
UVLO  
VDD  
UVLO  
STB2  
VOUT2  
2.0ms 3.2ms  
Figure 30. VDD=STB1=STB2, SEQON = GND  
When SEQON pin is H, inverted DC/DC and step-up DC/DC is controlled by internal sequence.  
When UVLO is released in condition where STB1 = VDD, inverted DC/DC soft-start begins, after step-up DC/DC soft-starts  
ends.  
When UVLO is detected in condition where STB1 = VDD, inverted DC/DC and step-up DC/DC are OFF at the same timing.  
UVLO  
UVLO  
VDD  
STB1  
VOUT2  
VOUT1  
3.2ms  
2.0ms 3.9ms 3.2ms  
Figure 31. VDD=STB1=STB2, SEQON = VDD  
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Example Application  
TOP VIEW)  
L1  
VDD  
VOUT1  
VDDP  
VDDP  
VDDP  
HS2L  
LX2  
LX1  
DIS1  
CINP  
D1  
CO1  
RC1  
CC1  
R1A  
R1B  
JP1  
NON1  
VREF  
N.C.  
L2  
VOUT2  
BD81870  
D2  
GNDP  
VOUT2  
DIS2  
HSWON  
SEQON  
STB1  
STB2  
VDDA  
CREF  
(HTSSOP-B20)  
CO2  
JP2  
GNDA  
VDD  
CC2  
INV2  
CINA  
R2B  
R2A  
RC2  
Figure 32. Application Example  
Application Circuit components list  
VDD 3.6V, VOUT1 -6.2V/200mA, VOUT2 6.2V/200mA  
Parts name  
Value  
Company  
Parts Number  
CINA  
CINP  
L1  
1uF/16V  
10uF/16V  
Murata  
Murata  
Yuden  
ROHM  
Yuden  
ROHM  
ROHM  
Murata  
ROHM  
Yuden  
Yuden  
ROHM  
Yuden  
ROHM  
ROHM  
Murata  
ROHM  
GCM188R71C105KA64  
GCM31CR71C106KA64  
NRS4012T4R7MDGJV  
RB550VAM-30TR  
LMK316ABJ226KLHT  
MCR03  
4.7uH/1.2A  
30V/1A  
D1  
CO1  
R1A  
R1B  
CC1  
RC1  
CREF  
L2  
22uF/10V x2 series  
24kΩ, 100kΩ series  
20kΩ  
MCR03  
22pF/50V  
GCM1885C1H220JA16  
MCR03  
10kΩ  
0.1uF/10V  
4.7uH/1.2A  
30V/1A  
LMK105BJ104KVHF  
NRS4012T4R7MDGJV  
RB550VAM-30TR  
LMK316ABJ226KLHT  
MCR03  
D2  
CO2  
R2A  
R2B  
CC2  
RC2  
22uF/10V x2 series  
270kΩ x2 parallel  
20kΩ  
MCR03  
15pF/50V  
GCM1885C1H150JA16  
MCR03  
5.1kΩ  
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VDD 3.6V, VOUT1 -9.0V/30mA, VOUT2 18V/30mA  
Parts name  
Value  
Company  
Parts Number  
CINA  
CINP  
L1  
1uF/16V  
10uF/16V  
4.7uH/1.2A  
30V/1A  
Murata  
Murata  
Yuden  
ROHM  
Yuden  
ROHM  
ROHM  
Murata  
ROHM  
Yuden  
Yuden  
ROHM  
Yuden  
ROHM  
ROHM  
Murata  
ROHM  
GCM188R71C105KA64  
GCM31CR71C106KA64  
NRS4012T4R7MDGJV  
RB550VAM-30TR  
LMK316ABJ226KLHT  
MCR03  
D1  
CO1  
R1A  
R1B  
CC1  
RC1  
CREF  
L2  
22uF/10V x2 series  
180kΩ  
20kΩ  
MCR03  
33pF/50V  
2.2kΩ  
GCM1885C1H330JA16  
MCR03  
0.1uF/10V  
4.7uH/1.2A  
30V/1A  
LMK105BJ104KVHF  
NRS4012T4R7MDGJV  
RB550VAM-30TR  
EMK325BJ226KMHP  
MCR03  
D2  
CO2  
R2A  
R2B  
CC2  
RC2  
22uF/16V x2 series  
430kΩ x2 parallel  
10kΩ  
MCR03  
68pF/50V  
5.1kΩ  
GCM1885C1H680JA16  
MCR03  
Usable Component Range  
Limits  
TYP  
1
Parts name  
MIN  
Unit  
Conditions  
MAX  
0.6 (Note 1)  
CINA  
uF  
uF  
uF  
uF  
uF  
uF  
uH  
uH  
kΩ  
kΩ  
VDD=2.5V to 5.5V  
VDD=2.5V to 5.5V  
VOUT1= -6.2V  
VOUT1= -9V  
VOUT2=6.2V  
VOUT2=18V  
6 (Note 1)  
CINP  
10  
11  
11  
11  
11  
4.7  
4.7  
CO1 (Note 2)  
CO1 (Note 2)  
CO2 (Note 2)  
CO2 (Note 2)  
L1 (Note 2)  
L2 (Note 2)  
R1  
6.6 (Note 1)  
4.4 (Note 1)  
6.6 (Note 1)  
4.4 (Note 1)  
2.2  
(Note 3)  
(Note 3)  
(Note 3)  
(Note 3)  
10  
10  
2.2  
R1 = R1A + R1B  
250  
250  
R2 = R2A + R2B  
R2  
(Note 1) Select capacitor more than MIN limits, considering temperature characteristic, DC bias characteristics and etc.  
(Note 2) Select the parts considering gain and phase characteristics.  
(Note 3) Select the parts considering in-rush current at soft-start timing.  
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Selecting Application Components  
1. Output Inductor  
A shielded inductor that satisfies the current rating (current value, Ipeak as shown in the drawing below) and has a low DCR  
(direct current resistance component) is recommended.  
Inductor values affect output ripple current greatly.  
Vin - Vout  
Vin × η  
1
2
Vin × (-Vout)  
L × f × (Vin - Vout)  
Ipeak =  
Ipeak =  
×Iout +  
×
(inverted DC/DC)  
(step-up DC/DC)  
Vout  
Vin × η  
1 Vin × (Vout - Vin)  
×Iout +  
×
2
L × f × Vout  
η: Efficiency(<0.92), f: Switching frequency, L: inductance  
The second terms of the equations above are ripple current of the inductor which should be set at about 20 to 50% of the  
maximum output current.  
(Note) Applying a current more than the current rating of the inductor brings the inductor into magnetic saturation, which may  
lead to lower efficiency or undesired output oscillation. Select an inductor with an adequate margin so that the peak current  
does not exceed the rated current of the inductor.  
IL  
Figure 33. Ripple Current  
2. Output capacitor  
A ceramic capacitor with low ESR is recommended for output in order to reduce output ripple.  
There must be an adequate margin between the maximum rating and output voltage of the capacitor, taking the DC bias  
property into consideration.  
When ceramic capacitor is used, the output ripple voltage is obtained by the following equation.  
Iout  
Cout  
-Vout  
Vin - Vout  
1
f
ΔVPP = Ipeak × R  
×
×
(inverted DC/DC)  
(step-up DC/DC)  
ESR  
ESR  
Iout Vout - Vin  
Cout  
1
ΔVPP = Ipeak × R  
×
×
Vout  
f
Setting must be performed so that output ripple is within the allowable ripple voltage.  
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3. Output voltage  
CH1  
The reference voltage of CH1 is 1.0V and the internal reference voltage of the ERROR AMP is 0V.  
Output voltage should be obtained by following equation.  
R1A  
VOUT1 = -  
× 1.0V  
R1B  
VREF  
1.0V  
Internal IC  
R1B  
NON1  
R1A  
ERROR AMP  
VOUT1  
Figure 34. CH1 setting of feedback resistance  
CH2  
The internal reference voltage of the ERROR AMP is 0.8V.  
Output voltage should be obtained by following equation.  
R2A + R2B  
VOUT2 =  
× 0.8V  
R2B  
Internal IC  
VOUT2  
R2A  
INV2  
R2B  
ERROR AMP  
0.8V  
Figure 35. CH2 setting of feedback resistance  
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Notice for application  
1. Soft-start function of inverted DC/DC  
Soft-start function of inverted DC/DC is due to the soft-start function of VREF, voltage reference for inverted channel.  
When inverted channel is OFF, VREF voltage is discharged by internal MOS (typ. 150Ω).  
When inverted channel is turned ON immediately after turning OFF, in case VREF voltage is not fully discharged, there will be  
no soft-start of inverted output and it may cause in-rush current at the time of start-up.  
SS1  
VREF  
1.0V  
Voltage  
Reference  
VREF  
VOUT1  
STB1  
_______  
STB1  
R1B  
NON1  
R1A  
ERROR AMP  
VOUT1  
Internal IC  
Figure 36. CH1 soft-start function  
2. Soft-start time of high-side switch  
Soft-start time of high-side switch is determined by input voltage and output voltage setting.  
Soft-start time THSWSS is determined by following equation.  
VDD - Vf  
THSWSS = 1.6msec ×  
Vout  
At high-side switch soft-start time, the current to output capacitor is determined by the following.  
Cout×Vout  
IHSWSS  
=
1.6msec  
As example, IHSWSS = 53mA, when Cout=4.7uF and Vout=18V,  
3. Capable output current  
Capable output current of inverted DC/DC and step-up DC/DC is determined by input voltage and output voltage setting,  
because Duty or operating range of FET is limited. The table below shows the capable output current in input and output  
voltage conditions.  
Table below shows the typical output current when an IC is off-latch. Not production tested.  
VOUT1[V]  
VOUT2[V]  
12  
76  
Iout[mA]  
2.5  
Iout [mA ]  
2.5  
-6  
-9  
6
9
15  
18  
220  
350  
480  
602  
722  
844  
952  
123  
243  
343  
436  
252  
406  
584  
777  
1000  
150  
252  
364  
481  
608  
738  
876  
3
3.5  
4
3
3.5  
4
177  
268  
352  
440  
534  
644  
97  
200  
273  
340  
414  
487  
120  
215  
276  
334  
383  
VDD[V]  
VDD[V]  
4.5  
5
5.5  
4.5  
5
5.5  
Figure 37. Output Current Ability  
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4. Termination of not-in-use channel  
When only inverted DC/DC is used, terminals should be set as below.  
VDD  
VDDP  
VDDP  
VDDP  
HS2L  
LX1  
DIS1  
NON1  
VREF  
N.C.  
BD81870  
LX2  
GNDP  
HSWON  
SEQON  
STB1  
STB2  
VDDA  
(HTSSOP-B20)  
VOUT2  
DIS2  
GNDA  
VDD  
INV2  
Figure 38. Disable CH2 boost DC/DC channel  
When only step-up DC/DC is used, terminals should be set as below.  
VDD  
VDDP  
VDDP  
VDDP  
HS2L  
LX2  
LX1  
DIS1  
NON1  
VREF  
N.C.  
VOUT2  
BD81870  
GNDP  
VOUT2  
DIS2  
HSWON  
SEQON  
STB1  
STB2  
VDDA  
(HTSSOP-B20)  
GNDA  
VDD  
INV2  
Figure 39. Disable CH1 inverted DC/DC channel  
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Layout Guideline  
DC/DC converter switching line must be as short and thick as possible to reduce line impedance. If the wiring is long, ringing  
caused by switching would increase and this may exceed the absolute maximum voltage ratings. If the parts are located far  
apart, consider inserting a snubber circuit.  
The thermal Pad on the back side of IC has the great thermal conduction to the chip. So using the GND plain as broad and  
wide as possible can help thermal dissipation. And a lot of thermal via for helping the spread of heat to the different layer is  
also effective. When there is unused area on PCB, please arrange the copper foil plain of DC nodes, such as GND, VIN and  
VOUT for helping heat dissipation of IC or circumference parts.  
Figure 40. PCB Pattern Reference  
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I/O Equivalent Circuit  
VDDA  
STB2, STB1  
SEQON, HSWON  
VDDA  
VDDA  
VDDA  
SEQON  
HSWON  
STB1,  
STB2  
GNDA  
GNDA  
GNDA GNDA  
GNDA  
GNDA  
VREF  
NON1  
HS2L  
DIS2  
DIS1  
VDDA  
VDDA  
VDDA  
VDDA  
VDDA  
VREF  
NON1  
GNDA  
DIS1  
GNDA  
GNDA  
GNDA  
LX1, VDDP  
LX2  
VDDP  
HS2L  
VDDP  
LX2  
LX1  
GNDP  
GNDP  
GNDP  
GNDP  
VOUT2  
INV2  
VOUT2  
VDDA  
VOUT2  
INV2  
DIS2  
GNDA  
GNDP  
GNDP  
GNDP  
GNDA  
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Operational Notes  
1.  
Reverse Connection of Power Supply  
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when  
connecting the power supply, such as mounting an external diode between the power supply and the ICs power  
supply pins.  
2.  
Power Supply Lines  
Design the PCB layout pattern to provide low impedance supply lines. Furthermore, connect a capacitor to ground at  
all power supply pins. Consider the effect of temperature and aging on the capacitance value when using electrolytic  
capacitors.  
3.  
4.  
Ground Voltage  
Except for pins the output and the input of which were designed to go below ground, ensure that no pins are at a  
voltage below that of the ground pin at any time, even during transient condition.  
Ground Wiring Pattern  
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but  
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal  
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations  
on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.  
5.  
Thermal Consideration  
Should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may  
result in deterioration of the properties of the chip. In case of exceeding this absolute maximum rating, increase the  
board size and copper area to prevent exceeding the maximum junction temperature rating.  
6.  
7.  
Recommended Operating Conditions  
These conditions represent a range within which the expected characteristics of the IC can be approximately  
obtained. The electrical characteristics are guaranteed under the conditions of each parameter.  
Inrush Current  
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may  
flow instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power  
supply. Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring,  
and routing of connections.  
8.  
9.  
Operation Under Strong Electromagnetic Field  
Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.  
Testing on Application Boards  
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may  
subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply  
should always be turned off completely before connecting or removing it from the test setup during the inspection  
process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during  
transport and storage.  
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Operational Notes continued  
10. Inter-pin Short and Mounting Errors  
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in  
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.  
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment)  
and unintentional solder bridge deposited in between pins during assembly to name a few.  
11. Unused Input Pins  
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and  
extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small  
charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and  
cause unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the  
power supply or ground line.  
12. Regarding the Input Pin of the IC  
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them  
isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a  
parasitic diode or transistor. For example (refer to figure below):  
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.  
When GND > Pin B, the P-N junction operates as a parasitic transistor.  
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual  
interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to  
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should  
be avoided.  
Resistor  
Transistor (NPN)  
Pin A  
Pin B  
Pin B  
B
E
C
Pin A  
B
C
E
P
P+  
P+  
N
P+  
P
P+  
N
N
N
N
N
N
N
Parasitic  
Elements  
Parasitic  
Elements  
P Substrate  
GND GND  
P Substrate  
GND  
GND  
Parasitic  
Elements  
Parasitic  
Elements  
N Region  
close-by  
Figure 41. Example of monolithic IC structure  
13. Ceramic Capacitor  
When using a ceramic capacitor, determine the dielectric constant considering the change of capacitance with  
temperature and the decrease in nominal capacitance due to DC bias and others.  
14. Area of Safe Operation (ASO)  
Operate the IC such that the output voltage, output current, and the maximum junction temperature rating are all  
within the Area of Safe Operation (ASO).  
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Operational Notes continued  
15. Thermal Shutdown Circuit(TSD)  
This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always  
be within the IC’s maximum junction temperature rating. If however the rating is exceeded for a continued period, the  
junction temperature (Tj) will rise which will activate the TSD circuit that will turn OFF all output pins. When the Tj falls  
below the TSD threshold, the circuits are automatically restored to normal operation.  
Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no  
circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from  
heat damage.  
16. Over Current Protection Circuit (OCP)  
This IC incorporates an integrated overcurrent protection circuit that is activated when the load is shorted. This  
protection circuit is effective in preventing damage due to sudden and unexpected incidents. However, the IC should  
not be used in applications characterized by continuous operation or transitioning of the protection circuit.  
17. Disturbance light  
In a device where a portion of silicon is exposed to light such as in a WL-CSP, IC characteristics may be affected due  
to photoelectric effect. For this reason, it is recommended to come up with countermeasures that will prevent the chip  
from being exposed to light.  
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Ordering Information  
B D 8  
1
8
7
0 E  
F
V
ME2  
Parts number  
Package  
Product Rank  
EFV:HTSSOP-B20  
M: for Automotive  
Packaging specification  
E2: Embossed carrier tape  
Marking Diagram  
Parts Number Marking  
LOT Number  
D 8 1 8 7 0  
1 PIN MARK  
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Physical Dimension, Tape and Reel Information  
Package Name  
HTSSOP-B20  
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Revision History  
日付  
Revision  
001  
変更内容  
New Release  
29.July.2016  
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Notice  
Precaution on using ROHM Products  
(Note 1)  
1. If you intend to use our Products in devices requiring extremely high reliability (such as medical equipment  
,
aircraft/spacecraft, nuclear power controllers, etc.) and whose malfunction or failure may cause loss of human life,  
bodily injury or serious damage to property (Specific Applications), please consult with the ROHM sales  
representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way  
responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any  
ROHMs Products for Specific Applications.  
(Note1) Medical Equipment Classification of the Specific Applications  
JAPAN  
USA  
EU  
CHINA  
CLASS  
CLASSⅣ  
CLASSb  
CLASSⅢ  
CLASSⅢ  
CLASSⅢ  
2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor  
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate  
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which  
a failure or malfunction of our Products may cause. The following are examples of safety measures:  
[a] Installation of protection circuits or other protective devices to improve system safety  
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure  
3. Our Products are not designed under any special or extraordinary environments or conditions, as exemplified below.  
Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the  
use of any ROHM’s Products under any special or extraordinary environments or conditions. If you intend to use our  
Products under any special or extraordinary environments or conditions (as exemplified below), your independent  
verification and confirmation of product performance, reliability, etc, prior to use, must be necessary:  
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents  
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust  
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,  
H2S, NH3, SO2, and NO2  
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves  
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items  
[f] Sealing or coating our Products with resin or other coating materials  
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of  
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning  
residue after soldering  
[h] Use of the Products in places subject to dew condensation  
4. The Products are not subject to radiation-proof design.  
5. Please verify and confirm characteristics of the final or mounted products in using the Products.  
6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,  
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power  
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect  
product performance and reliability.  
7. De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in  
the range that does not exceed the maximum junction temperature.  
8. Confirm that operation temperature is within the specified range described in the product specification.  
9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in  
this document.  
Precaution for Mounting / Circuit board design  
1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product  
performance and reliability.  
2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must  
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,  
please consult with the ROHM representative in advance.  
For details, please refer to ROHM Mounting specification  
Notice-PAA-E  
Rev.003  
© 2015 ROHM Co., Ltd. All rights reserved.  
Precautions Regarding Application Examples and External Circuits  
1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the  
characteristics of the Products and external components, including transient characteristics, as well as static  
characteristics.  
2. You agree that application notes, reference designs, and associated data and information contained in this document  
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely  
responsible for it and you must exercise your own independent verification and judgment in the use of such information  
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses  
incurred by you or third parties arising from the use of such information.  
Precaution for Electrostatic  
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper  
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be  
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,  
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).  
Precaution for Storage / Transportation  
1. Product performance and soldered connections may deteriorate if the Products are stored in the places where:  
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2  
[b] the temperature or humidity exceeds those recommended by ROHM  
[c] the Products are exposed to direct sunshine or condensation  
[d] the Products are exposed to high Electrostatic  
2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period  
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is  
exceeding the recommended storage time period.  
3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads  
may occur due to excessive stress applied when dropping of a carton.  
4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of  
which storage time is exceeding the recommended storage time period.  
Precaution for Product Label  
A two-dimensional barcode printed on ROHM Products label is for ROHMs internal use only.  
Precaution for Disposition  
When disposing Products please dispose them properly using an authorized industry waste company.  
Precaution for Foreign Exchange and Foreign Trade act  
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign  
trade act, please consult with ROHM in case of export.  
Precaution Regarding Intellectual Property Rights  
1. All information and data including but not limited to application example contained in this document is for reference  
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any  
other rights of any third party regarding such information or data.  
2. ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the  
Products with other articles such as components, circuits, systems or external equipment (including software).  
3. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any  
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM  
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to  
manufacture or sell products containing the Products, subject to the terms and conditions herein.  
Other Precaution  
1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.  
2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written  
consent of ROHM.  
3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the  
Products or this document for any military purposes, including but not limited to, the development of mass-destruction  
weapons.  
4. The proper names of companies or products described in this document are trademarks or registered trademarks of  
ROHM, its affiliated companies or third parties.  
Notice-PAA-E  
Rev.003  
© 2015 ROHM Co., Ltd. All rights reserved.  
Daattaasshheeeett  
General Precaution  
1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.  
ROHM shall not be in an y way responsible or liable for failure, malfunction or accident arising from the use of a ny  
ROHM’s Products against warning, caution or note contained in this document.  
2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior  
notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s  
representative.  
3. The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all  
information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or  
liable for any damages, expenses or losses incurred by you or third parties resulting from inaccuracy or errors of or  
concerning such information.  
Notice – WE  
Rev.001  
© 2015 ROHM Co., Ltd. All rights reserved.  
Datasheet  
BD81870EFV-M - Web Page  
Part Number  
Package  
Unit Quantity  
BD81870EFV-M  
HTSSOP-B20  
2500  
Minimum Package Quantity  
Packing Type  
Constitution Materials List  
RoHS  
2500  
Taping  
inquiry  
Yes  
配单直通车
BD8184MUV-E2产品参数
型号:BD8184MUV-E2
是否Rohs认证: 符合
生命周期:Not Recommended
零件包装代码:QFN
包装说明:4 X 4 MM, ROHS COMPLIANT, VQFN-24
针数:24
Reach Compliance Code:compliant
ECCN代码:EAR99
HTS代码:8542.39.00.01
风险等级:5.64
可调阈值:NO
模拟集成电路 - 其他类型:POWER SUPPLY SUPPORT CIRCUIT
JESD-30 代码:S-XQCC-N24
长度:4 mm
信道数量:1
功能数量:1
端子数量:24
最高工作温度:85 °C
最低工作温度:-40 °C
封装主体材料:UNSPECIFIED
封装代码:HVQCCN
封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):NOT SPECIFIED
座面最大高度:1 mm
最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):3.3 V
表面贴装:YES
温度等级:INDUSTRIAL
端子形式:NO LEAD
端子节距:0.5 mm
端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:4 mm
Base Number Matches:1
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