BF1201WR各脚功能电路原理芯片引脚定义引脚图及功能IC贸易商-中国IC网-芯三七

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产品型号BF1201WR的概述

芯片BF1201WR的概述 BF1201WR是一款专为低功耗无线通讯设计的集成电路（IC），广泛应用于物联网（IoT）设备、穿戴设备及智能家居产品等领域。这款芯片具备高灵敏度、低噪声和高效率的特点，能够在多种应用场景下提供稳定的性能。BF1201WR以其小巧的封装和灵活的接口，使其成为开发人员在产品设计中的理想选择。芯片BF1201WR的详细参数 BF1201WR的关键技术参数如下： - 供电电压：支持1.8V至3.6V的宽电压范围，适应不同应用需求。 - 工作频率：典型工作频率在2.4GHz波段，使其能够与大多数无线通信设备兼容。 - 发射功率：调整范围覆盖-5dBm至+4dBm，适合短距离传输。 - 灵敏度：具备-95dBm的接收灵敏度，保障在较差信号环境下的通信质量。 - 数据速率：支持速率从1kbps到250kbps的灵活选择，满足不同应用对于传输速度的要求。 - 温度范围：...

产品型号BF1201WR的Datasheet PDF文件预览

DISCRETE SEMICONDUCTORS

DATA SHEET

BF1201; BF1201R; BF1201WR

N-channel dual-gate PoLo

MOS-FETs

Product speciﬁcation

2000 Mar 29

Supersedes data of 1999 Dec 01

Philips Semiconductors

Product speciﬁcation

BF1201; BF1201R;

BF1201WR

N-channel dual-gate PoLo MOS-FETs

FEATURES

PINNING

• Short channel transistor with high

forward transfer admittance to input

capacitance ratio

DESCRIPTION

handbook, 2 columns

source

drain

• Low noise gain controlled amplifier

gate 2

gate 1

• Partly internal self-biasing circuit to

ensure good cross-modulation

performance during AGC and good

DC stabilization.

Top view

MSB035

BF1201R marking code: LBp

APPLICATIONS

Fig.2 Simplified outline

(SOT143R).

• VHF and UHF applications with

3 to 9 V supply voltage, such as

digital and analogue television

tuners and professional

communications equipment.

handbook, 2 c4olumns

page

DESCRIPTION

Enhancement type N-channel

field-effect transistor with source and

substrate interconnected. Integrated

diodes between gates and source

protect against excessive input

voltage surges. The BF1201,

BF1201R and BF1201WR are

encapsulated in the SOT143B,

SOT143R and SOT343R plastic

packages respectively.

Top view

MSB842

Top view

MSB014

BF1201 marking code: LAp.

BF1201WR marking code: LA

Fig.1 Simplified outline

(SOT143B).

Fig.3 Simplified outline

(SOT343R).

QUICK REFERENCE DATA

SYMBOL

V_DS

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

drain-source voltage

drain current

−

I_D

200

3.1

1.8

−

P_tot

y_fs

total power dissipation

forward transfer admittance

input capacitance at gate 1

reverse transfer capacitance

noise ﬁgure

−

2.6

C_ig1-ss

C_rss

f = 1 MHz

−

f = 400 MHz

−

X_mod

cross-modulation

input level for k = 1% at

40 dB AGC

105

−

dBµV

T_j

operating junction temperature

−

150

°C

CAUTION

This product is supplied in anti-static packing to prevent damage caused by electrostatic discharge during transport

and handling. For further information, refer to Philips specs.: SNW-EQ-608, SNW-FQ-302A and SNW-FQ-302B.

2000 Mar 29

Philips Semiconductors

Product speciﬁcation

BF1201; BF1201R;

BF1201WR

N-channel dual-gate PoLo MOS-FETs

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 60134).

SYMBOL

PARAMETER

drain-source voltage

CONDITIONS

MIN.

MAX.

UNIT

V_DS

I_D

−

drain current (DC)

gate 1 current

I_G1

I_G2

P_tot

±10

gate 2 current

total power dissipation

BF1201; BF1201R

BF1201WR

T_s≤ 113 °C; note 1

T_s≤ 109 °C; note 1

−

200

+150

150

°C

T_stg

T_j

storage temperature

operating junction temperature

−65

−

°C

Note

1. T_sis the temperature of the soldering point of the source lead.

THERMAL CHARACTERISTICS

SYMBOL

PARAMETER

VALUE

UNIT

R_{th j-s}

thermal resistance from junction to soldering point

BF1201; BF1201R

185

155

K/W

BF1201WR

MCD934

250

handbook, halfpage

tot

(mW)

200

(1)

(2)

150

100

150

200

(°C)

(1) BF1201WR.

(2) BF1201 and BF1201R.

Fig.4 Power derating curve.

2000 Mar 29

Philips Semiconductors

Product speciﬁcation

BF1201; BF1201R;

BF1201WR

N-channel dual-gate PoLo MOS-FETs

STATIC CHARACTERISTICS

T_j= 25 °C; unless otherwise speciﬁed.

SYMBOL

PARAMETER

CONDITIONS

MIN. MAX. UNIT

V_(BR)DSS

drain-source breakdown voltage

V_G1-S= V_G2-S= 0; I_D= 10 µA

V_G2-S= V_DS= 0; I_G1-S= 10 mA

V_G1-S= V_DS= 0; I_G2-S= 10 mA

V_G2-S= V_DS= 0; I_S-G1= 10 mA

V_G1-S= V_DS= 0; I_S-G2= 10 mA

V_G2-S= 4 V; V_DS= 5 V; I_D= 100 µA

V_G1-S= V_DS= 5 V; I_D= 100 µA

−

V_(BR)G1-SSgate 1-source breakdown voltage

V_(BR)G2-SSgate 2-source breakdown voltage

−

V_(F)S-G1

V_(F)S-G2

V_G1-S(th)

V_G2-S(th)

I_DSX

forward source-gate 1 voltage

forward source-gate 2 voltage

gate 1-source threshold voltage

gate 2-source threshold voltage

drain-source current

0.5

0.3

1.5

1.0

1.2

V_G2-S= 4 V; V_DS= 5 V; R_G1= 62 kΩ;

note 1

I_G1-SS

I_G2-SS

gate 1 cut-off current

gate 2 cut-off current

V_G2-S= V_DS= 0; V_G1-S= 5 V

V_G1-S= V_DS= 0; V_G2-S= 4 V

−

Note

1. R_G1connects G₁to V_GG= 5 V.

DYNAMIC CHARACTERISTICS

Common source; T_amb= 25 °C; V_G2-S= 4 V; V_DS= 5 V; I_D= 15 mA; unless otherwise speciﬁed.

SYMBOL

y_fs

PARAMETER

CONDITIONS

MIN.

TYP. MAX. UNIT

forward transfer admittance pulsed; T_j= 25 °C

input capacitance at gate 1 f = 1 MHz

input capacitance at gate 2 f = 1 MHz

2.6

1.1

0.9

3.1

−

C_ig1-ss

C_ig2-ss

C_oss

−

output capacitance

f = 1 MHz

−

C_rss

reverse transfer capacitance f = 1 MHz

noise ﬁgure

power gain

f = 10.7 MHz; G_S= 20 mS; B_S= 0

f = 400 MHz; Y_S= Y_{S opt}

1.8

2.5

−

f = 800 MHz; Y_S= Y_{S opt}

1.9

33.5

G_tr

f = 200 MHz; G_S= 2 mS; B_S= B_{S opt}

;

G_L= 0.5 mS; B_L= B_{L opt}

f = 400 MHz; G_S= 2 mS; B_S= B_{S opt}

G_L= 1 mS; B_L= B_{L opt}

f = 800 MHz; G_S= 3.3 mS; B_S= B_{S opt}

G_L= 1 mS; B_L= B_{L opt}

;

−

;

X_mod

cross-modulation

input level for k = 1%; f_w= 50 MHz;

f_unw= 60 MHz; note 1

at 0 dB AGC

at 10 dB AGC

at 40 dB AGC

−

dBµV

−

105

Note

1. Measured in Fig.21 test circuit.

2000 Mar 29

Philips Semiconductors

Product speciﬁcation

BF1201; BF1201R;

BF1201WR

N-channel dual-gate PoLo MOS-FETs

MCD935

MCD936

handbook, halfpage

3.5 V

3 V

= 4 V

G2-S

(mA)

= 1.8 V

G1-S

(mA)

2.5 V

2 V

1.7 V

1.6 V

1.5 V

1.4 V

1.3 V

1.2 V

1.5 V

1 V

0.5

1.5

2.5

(V)

G1-S

V_DS= 5 V.

V_G2-S= 4 V.

T_j= 25 °C.

Fig.5 Transfer characteristics; typical values.

Fig.6 Output characteristics; typical values.

MCD937

MCD938

100

handbook, halfpage

= 4 V

G2-S

(µA)

3.5 V

3 V

= 4 V

(mS)

G2-S

3.5 V

2.5 V

3 V

2.5 V

2 V

1.5 V

0.5

1.5

2.5

(V)

(mA)

G1-S

V_DS= 5 V.

T_j= 25 °C.

Fig.7 Gate 1 current as a function of gate 1

voltage; typical values.

Fig.8 Forward transfer admittance as a function

of drain current; typical values.

2000 Mar 29

Philips Semiconductors

Product speciﬁcation

BF1201; BF1201R;

BF1201WR

N-channel dual-gate PoLo MOS-FETs

MCD940

MCD939

handbook, halfpage

(mA)

(µA)

(V)

V_DS= 5 V; V_G2-S= 4 V.

V_DS= 5 V; V_G2-S= 4 V; T_j= 25 °C.

R_G1= 62 kΩ (connected to V_GG); see Fig.21.

T_j= 25 °C.

Fig.9 Drain current as a function of gate 1 current;

typical values.

Fig.10 Drain current as a function of gate 1 supply

voltage (= V_GG); typical values.

MCD941

MCD942

handbook, halfpage

68 kΩ

82 kΩ

handbook, halfpage

= 39 kΩ

47 kΩ

56 kΩ

62 kΩ

(mA)

= 5 V

100 kΩ

4.5 V

4 V

3.5 V

3 V

(V)

= V

G2-S

V_G2-S= 4 V; T_j= 25 °C.

R_G1connected to V_GG; see Fig.21.

V_DS= 5 V; T_j= 25 °C.

R_G1= 62 kΩ (connected to V_GG); see Fig.21.

Fig.11 Drain current as a function of gate 1 (= V_GG

and drain supply voltage; typical values.

)

Fig.12 Drain current as a function of gate 2

voltage; typical values.

2000 Mar 29

Philips Semiconductors

Product speciﬁcation

BF1201; BF1201R;

BF1201WR

N-channel dual-gate PoLo MOS-FETs

MCD943

MCD944

handbook, halfpage

= 5 V

handbook, halfpage

gain

reduction

(dB)

(µA)

−10

4.5 V

4 V

−20

−30

3.5 V

3 V

−40

−50

(V)

G2-S

AGC

V_DS= 5 V; T_j= 25 °C.

R_G1= 62 kΩ (connected to V_GG); see Fig.21.

V_DS= 5 V; V_GG= 5 V; R_G1= 62 kΩ;

f = 50 MHz; T_amb= 25 °C.

Fig.13 Gate 1 current as a function of gate 2

voltage; typical values.

Fig.14 Typical gain reduction as a function of the

AGC voltage; see Fig.21.

MCD945

120

MCD946

handbook, halfpage

unw

(dBµV)

(mA)

110

100

gain reduction (dB)

V_DS= 5 V; V_GG= 5 V; R_G1= 62 kΩ; f = 50 MHz;

f_unw= 60 MHz; T_amb= 25 °C.

V_DS= 5 V; V_GG= 5 V; R_G1= 62 kΩ;

f = 50 MHz; T_amb= 25 °C.

Fig.15 Unwanted voltage for 1% cross-modulation

as a function of gain reduction; typical

values; see Fig.21.

Fig.16 Drain current as a function of gain

reduction; typical values; see Fig.21.

2000 Mar 29

Philips Semiconductors

Product speciﬁcation

BF1201; BF1201R;

BF1201WR

N-channel dual-gate PoLo MOS-FETs

MCD947

MCD948

handbook, halfpage

−10

handbook, halfpage

(mS)

(deg)

(µS)

−10

−1

f (MHz)

V_DS= 5 V; V_G2= 4 V.

I_D= 15 mA; T_amb= 25 °C.

Fig.17 Input admittance as a function of frequency;

typical values.

Fig.18 Reverse transfer admittance and phase as

a function of frequency; typical values.

MCD949

MCD950

−10

handbook, halfpage

(deg)

(mS)

−10

−1

−2

−1

f (MHz)

V_DS= 5 V; V_G2= 4 V.

I_D= 15 mA; T_amb= 25 °C.

Fig.19 Forward transfer admittance and phase as

a function of frequency; typical values.

Fig.20 Output admittance as a function of

frequency; typical values.

2000 Mar 29

Philips Semiconductors

Product speciﬁcation

BF1201; BF1201R;

BF1201WR

N-channel dual-gate PoLo MOS-FETs

handbook, full pagewidth

AGC

10 kΩ

4.7 nF

50 Ω

≈2.2 µH

DUT

4.7 nF

GEN

50 Ω

4.7 nF

MGS315

Fig.21 Cross-modulation test set-up.

Table 1 Scattering parameters: V_DS= 5 V; V_G2-S= 4 V; I_D= 15 mA; T_amb= 25 °C

s₁₁

s₂₁

s₁₂

s₂₂

MAGNITUDE ANGLE MAGNITUDE ANGLE MAGNITUDE ANGLE MAGNITUDE ANGLE

(MHz)

(ratio)

(deg)

(ratio)

(deg)

(ratio)

(deg)

(ratio)

(deg)

100

200

300

400

500

600

700

800

900

1000

0.987

0.985

0.978

0.976

0.949

0.928

0.905

0.882

0.860

0.838

0.818

−4.72

−9.39

2.775

2.774

2.731

2.671

2.599

2.501

2.400

2.297

2.199

2.096

1.997

174.6

169.5

159.1

148.8

138.8

129.1

119.8

110.9

102.4

94.2

0.0006

0.0010

0.0019

0.0026

0.0032

0.0035

0.0033

0.0029

0.0024

0.0021

88.8

86.7

79.7

74.2

69.9

65.9

64.6

65.7

69.1

83.3

103.8

0.997

0.996

0.994

0.992

0.989

0.986

0.982

0.979

0.975

0.971

−1.84

−3.37

−18.59

−27.74

−36.59

−45.08

−53.26

−61.07

−68.48

−75.55

−82.23

−6.72

−10.02

−13.33

−16.55

−19.64

−22.63

−25.54

−28.44

−31.42

86.3

Table 2 Noise data: V_DS= 5 V; V_G2-S= 4 V; I_D= 15 mA; T_amb= 25 °C

Γ_opt

F_min

(dB)

R_n

(Ω)

(MHz)

(ratio)

(deg)

400

800

0.825

0.753

38.93

70.65

1.9

38.75

2000 Mar 29

Philips Semiconductors

Product speciﬁcation

BF1201; BF1201R;

BF1201WR

N-channel dual-gate PoLo MOS-FETs

PACKAGE OUTLINES

Plastic surface mounted package; 4 leads

SOT143B

detail X

2 mm

scale

DIMENSIONS (mm are the original dimensions)

max

UNIT

1.1

0.9

0.48

0.38

0.88

0.78

0.15

0.09

3.0

2.8

1.4

1.2

2.5

2.1

0.45

0.15

0.55

0.45

0.1

1.9

1.7

0.2

0.1

REFERENCES

JEDEC

EUROPEAN

PROJECTION

OUTLINE

VERSION

ISSUE DATE

IEC

EIAJ

97-02-28

SOT143B

2000 Mar 29

Philips Semiconductors

Product speciﬁcation

BF1201; BF1201R;

BF1201WR

N-channel dual-gate PoLo MOS-FETs

Plastic surface mounted package; reverse pinning; 4 leads

SOT143R

detail X

2 mm

scale

DIMENSIONS (mm are the original dimensions)

max

UNIT

1.1

0.9

0.48

0.38

0.88

0.78

0.15

0.09

3.0

2.8

1.4

1.2

2.5

2.1

0.55

0.25

0.45

0.25

0.1

1.9

1.7

0.2

0.1

REFERENCES

JEDEC

EUROPEAN

PROJECTION

OUTLINE

VERSION

ISSUE DATE

IEC

EIAJ

97-03-10

99-09-13

SOT143R

SC-61B

2000 Mar 29

Philips Semiconductors

Product speciﬁcation

BF1201; BF1201R;

BF1201WR

N-channel dual-gate PoLo MOS-FETs

Plastic surface mounted package; reverse pinning; 4 leads

SOT343R

detail X

2 mm

scale

DIMENSIONS (mm are the original dimensions)

max

UNIT

0.4

0.3

1.1

0.8

0.7

0.5

0.25

0.10

2.2

1.8

1.35

1.15

2.2

2.0

0.45

0.15

0.23

0.13

0.1

1.15

0.2

0.1

1.3

REFERENCES

JEDEC

EUROPEAN

PROJECTION

OUTLINE

VERSION

ISSUE DATE

IEC

EIAJ

SOT343R

97-05-21

2000 Mar 29

Philips Semiconductors

Product speciﬁcation

BF1201; BF1201R;

BF1201WR

N-channel dual-gate PoLo MOS-FETs

DATA SHEET STATUS

PRODUCT

DATA SHEET STATUS

STATUS

DEFINITIONS ⁽¹⁾

Objective speciﬁcation

Development This data sheet contains the design target or goal speciﬁcations for

product development. Speciﬁcation may change in any manner without

notice.

Preliminary speciﬁcation Qualiﬁcation

This data sheet contains preliminary data, and supplementary data will be

published at a later date. Philips Semiconductors reserves the right to

make changes at any time without notice in order to improve design and

supply the best possible product.

Product speciﬁcation

Production

This data sheet contains ﬁnal speciﬁcations. Philips Semiconductors

reserves the right to make changes at any time without notice in order to

improve design and supply the best possible product.

Note

1. Please consult the most recently issued data sheet before initiating or completing a design.

DEFINITIONS

DISCLAIMERS

Short-form specification

The data in a short-form

Life support applications

These products are not

specification is extracted from a full data sheet with the

same type number and title. For detailed information see

the relevant data sheet or data handbook.

designed for use in life support appliances, devices, or

systems where malfunction of these products can

reasonably be expected to result in personal injury. Philips

Semiconductors customers using or selling these products

for use in such applications do so at their own risk and

agree to fully indemnify Philips Semiconductors for any

damages resulting from such application.

Limiting values definition Limiting values given are in

accordance with the Absolute Maximum Rating System

(IEC 60134). Stress above one or more of the limiting

values may cause permanent damage to the device.

These are stress ratings only and operation of the device

at these or at any other conditions above those given in the

Characteristics sections of the specification is not implied.

Exposure to limiting values for extended periods may

affect device reliability.

Right to make changes

Philips Semiconductors

reserves the right to make changes, without notice, in the

products, including circuits, standard cells, and/or

software, described or contained herein in order to

improve design and/or performance. Philips

Semiconductors assumes no responsibility or liability for

the use of any of these products, conveys no licence or title

under any patent, copyright, or mask work right to these

products, and makes no representations or warranties that

these products are free from patent, copyright, or mask

work right infringement, unless otherwise specified.

Application information

Applications that are

described herein for any of these products are for

illustrative purposes only. Philips Semiconductors make

no representation or warranty that such applications will be

suitable for the specified use without further testing or

modification.

2000 Mar 29

Philips Semiconductors

Product speciﬁcation

N-channel dual-gate PoLo MOS-FETs

BF1201; BF1201R; BF1201WR

NOTES

2000 Mar 29

Philips Semiconductors

Product speciﬁcation

N-channel dual-gate PoLo MOS-FETs

BF1201; BF1201R; BF1201WR

NOTES

2000 Mar 29

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04547-130 SÃO PAULO, SP, Brazil,

Tel. +55 11 821 2333, Fax. +55 11 821 2382

Germany: Hammerbrookstraße 69, D-20097 HAMBURG,

Tel. +49 40 2353 60, Fax. +49 40 2353 6300

Spain: Balmes 22, 08007 BARCELONA,

Tel. +34 93 301 6312, Fax. +34 93 301 4107

Hungary: see Austria

Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM,

Tel. +46 8 5985 2000, Fax. +46 8 5985 2745

India: Philips INDIA Ltd, Band Box Building, 2nd floor,

254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025,

Tel. +91 22 493 8541, Fax. +91 22 493 0966

Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,

Tel. +41 1 488 2741 Fax. +41 1 488 3263

Indonesia: PT Philips Development Corporation, Semiconductors Division,

Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510,

Tel. +62 21 794 0040 ext. 2501, Fax. +62 21 794 0080

Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1,

TAIPEI, Taiwan Tel. +886 2 2134 2886, Fax. +886 2 2134 2874

Ireland: Newstead, Clonskeagh, DUBLIN 14,

Tel. +353 1 7640 000, Fax. +353 1 7640 200

Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,

209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260,

Tel. +66 2 745 4090, Fax. +66 2 398 0793

Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053,

TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007

Turkey: Yukari Dudullu, Org. San. Blg., 2.Cad. Nr. 28 81260 Umraniye,

ISTANBUL, Tel. +90 216 522 1500, Fax. +90 216 522 1813

Italy: PHILIPS SEMICONDUCTORS, Via Casati, 23 - 20052 MONZA (MI),

Tel. +39 039 203 6838, Fax +39 039 203 6800

Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,

252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461

Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku,

TOKYO 108-8507, Tel. +81 3 3740 5130, Fax. +81 3 3740 5057

United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,

MIDDLESEX UB3 5BX, Tel. +44 208 730 5000, Fax. +44 208 754 8421

Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL,

Tel. +82 2 709 1412, Fax. +82 2 709 1415

United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,

Tel. +1 800 234 7381, Fax. +1 800 943 0087

Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,

Tel. +60 3 750 5214, Fax. +60 3 757 4880

Uruguay: see South America

Vietnam: see Singapore

Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,

Tel. +9-5 800 234 7381, Fax +9-5 800 943 0087

Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,

Middle East: see Italy

Tel. +381 11 3341 299, Fax.+381 11 3342 553

For all other countries apply to: Philips Semiconductors,

Internet: http://www.semiconductors.philips.com

International Marketing & Sales Communications, Building BE-p, P.O. Box 218,

5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825

SCA

All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed

without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license

under patent- or other industrial or intellectual property rights.

Printed in The Netherlands

603504/02/pp16

Date of release: 2000 Mar 29

Document order number: 9397 750 06901

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BF1201WR产品参数

型号:	BF1201WR
是否无铅：	不含铅
是否Rohs认证：	符合
生命周期：	Obsolete
IHS 制造商：	NXP SEMICONDUCTORS
Reach Compliance Code：	unknown
ECCN代码：	EAR99
风险等级：	5.79
其他特性：	LOW NOISE
外壳连接：	SOURCE
配置：	SINGLE WITH BUILT-IN DIODE
最小漏源击穿电压：	10 V
最大漏极电流 (Abs) (ID)：	0.03 A
最大漏极电流 (ID)：	0.03 A
FET 技术：	METAL-OXIDE SEMICONDUCTOR
最大反馈电容 (Crss)：	0.03 pF
最高频带：	ULTRA HIGH FREQUENCY BAND
JESD-30 代码：	R-PDSO-G4
JESD-609代码：	e3
元件数量：	1
端子数量：	4
工作模式：	DUAL GATE, ENHANCEMENT MODE
最高工作温度：	150 °C
封装主体材料：	PLASTIC/EPOXY
封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE
峰值回流温度（摄氏度）：	NOT SPECIFIED
极性/信道类型：	N-CHANNEL
最大功率耗散 (Abs)：	0.2 W
认证状态：	Not Qualified
子类别：	FET General Purpose Power
表面贴装：	YES
端子面层：	Tin (Sn)
端子形式：	GULL WING
端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT SPECIFIED
晶体管应用：	AMPLIFIER
晶体管元件材料：	SILICON

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