Apple II FPGA Co-Processor
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Updated
Oct 31, 2024 - HTML
Apple II FPGA Co-Processor
Вектор-06ц в ПЛИС / Vector-06c in FPGA
USB PD cc pin monitor implemented in a Tang Nano 9K FPGA.
RISC-V implementation of rv32i for FPGA board Tang Nano 9K utilizing on-board burst PSRAM and flash
Commodore VIC-20 core for the Tang Nano 9k FPGA
6502 SBC in a Gowin GW1NR-9 FPGA on a Sipeed Tang Nano 9k
UART interface to a block ram in the Tang Nano 9k FPGA. No pin connections needed, just use the USB UART.
Commodore VIC20 core for the Tang Nano 9K FPGA with LCD Output
Zilog Z8 softcore in verilog
This is a re-write of my previous trigger project. This time Tang Nano 9k is the target hardware and the USB UART is used to configure and enable triggering.
An extremely simple CPU with custom ISA made in Verilog for the Tang Nano 9k complete with assembler written in C
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